clk: qcom: gcc-sm8650: Set delay for Venus CLK resets

Some Venus resets may require more time when toggling. Describe that.

The Venus hw on 8650 is similar to the one on 8550, follow its
requirements.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-13-c37eba13b5ce@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/gcc-sm8650.c b/drivers/clk/qcom/gcc-sm8650.c
index 9174dd82308c2b3efb10eec188744069228c6629..63becb03cd90f5c903fe590c5f92bffa5bd63e95 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8650.c
+++ b/drivers/clk/qcom/gcc-sm8650.c
@@ -3734,8 +3734,8 @@ static const struct qcom_reset_map gcc_sm8650_resets[] = {
        [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
        [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
        [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
-       [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
-       [GCC_VIDEO_AXI1_CLK_ARES] = { 0x32024, 2 },
+       [GCC_VIDEO_AXI0_CLK_ARES] = { .reg = 0x32018, .bit = 2, .udelay = 1000 },
+       [GCC_VIDEO_AXI1_CLK_ARES] = { .reg = 0x32024, .bit = 2, .udelay = 1000 },
        [GCC_VIDEO_BCR] = { 0x32000 },
 };