return sysfs_emit(buf, "%d\n", value);
 }
 
+/**
+ * DOC: vcn_busy_percent
+ *
+ * The amdgpu driver provides a sysfs API for reading how busy the VCN
+ * is as a percentage.  The file vcn_busy_percent is used for this.
+ * The SMU firmware computes a percentage of load based on the
+ * aggregate activity level in the IP cores.
+ */
+static ssize_t amdgpu_get_vcn_busy_percent(struct device *dev,
+                                                 struct device_attribute *attr,
+                                                 char *buf)
+{
+       struct drm_device *ddev = dev_get_drvdata(dev);
+       struct amdgpu_device *adev = drm_to_adev(ddev);
+       unsigned int value;
+       int r;
+
+       r = amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_VCN_LOAD, &value);
+       if (r)
+               return r;
+
+       return sysfs_emit(buf, "%d\n", value);
+}
+
 /**
  * DOC: pcie_bw
  *
                              .attr_update = pp_od_clk_voltage_attr_update),
        AMDGPU_DEVICE_ATTR_RO(gpu_busy_percent,                         ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RO(mem_busy_percent,                         ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
+       AMDGPU_DEVICE_ATTR_RO(vcn_busy_percent,         ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RO(pcie_bw,                                  ATTR_FLAG_BASIC),
        AMDGPU_DEVICE_ATTR_RW(pp_features,                              ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RO(unique_id,                                ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
                     gc_ver != IP_VERSION(9, 4, 3)) ||
                    gc_ver == IP_VERSION(9, 0, 1))
                        *states = ATTR_STATE_UNSUPPORTED;
+       } else if (DEVICE_ATTR_IS(vcn_busy_percent)) {
+               if (!(gc_ver == IP_VERSION(10, 3, 1) ||
+                         gc_ver == IP_VERSION(10, 3, 3) ||
+                         gc_ver == IP_VERSION(10, 3, 6) ||
+                         gc_ver == IP_VERSION(10, 3, 7) ||
+                         gc_ver == IP_VERSION(11, 0, 1) ||
+                         gc_ver == IP_VERSION(11, 0, 4) ||
+                         gc_ver == IP_VERSION(11, 5, 0)))
+                       *states = ATTR_STATE_UNSUPPORTED;
        } else if (DEVICE_ATTR_IS(pcie_bw)) {
                /* PCIe Perf counters won't work on APU nodes */
                if (adev->flags & AMD_IS_APU ||
        /* MEM Load */
        if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&value, &size))
                seq_printf(m, "MEM Load: %u %%\n", value);
+       /* VCN Load */
+       if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_LOAD, (void *)&value, &size))
+               seq_printf(m, "VCN Load: %u %%\n", value);
 
        seq_printf(m, "\n");