pinctrl: tegra: Add support to display pin function

The current function for a given pin is not displayed via the debugfs.
Add support to display the current function that is set for each pin.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/20230714113547.15384-1-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 4547cf66d03b9fea7385c2cd14dcc3fdceec290f..cb1d67239cd046edd2522805880c14f9f4963e2c 100644 (file)
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -96,6 +96,7 @@ static const struct cfg_param {
        {"nvidia,slew-rate-falling",    TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
        {"nvidia,slew-rate-rising",     TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
        {"nvidia,drive-type",           TEGRA_PINCONF_PARAM_DRIVE_TYPE},
+       {"nvidia,function",             TEGRA_PINCONF_PARAM_FUNCTION},
 };
 
 static int tegra_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
@@ -470,6 +471,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
                *bit = g->drvtype_bit;
                *width = 2;
                break;
+       case TEGRA_PINCONF_PARAM_FUNCTION:
+               *bank = g->mux_bank;
+               *reg = g->mux_reg;
+               *bit = g->mux_bit;
+               *width = 2;
+               break;
        default:
                dev_err(pmx->dev, "Invalid config param %04x\n", param);
                return -ENOTSUPP;
@@ -633,8 +640,16 @@ static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
                val >>= bit;
                val &= (1 << width) - 1;
 
-               seq_printf(s, "\n\t%s=%u",
-                          strip_prefix(cfg_params[i].property), val);
+               if (cfg_params[i].param == TEGRA_PINCONF_PARAM_FUNCTION) {
+                       u8 idx = pmx->soc->groups[group].funcs[val];
+
+                       seq_printf(s, "\n\t%s=%s",
+                                  strip_prefix(cfg_params[i].property),
+                                        pmx->functions[idx].name);
+               } else {
+                       seq_printf(s, "\n\t%s=%u",
+                                  strip_prefix(cfg_params[i].property), val);
+               }
        }
 }
 

diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h
index b3289bdf727d8291ff6d23931eeb0b61ceae6576..e728efeaa4def2f2cbd822e88822c58727342e0a 100644 (file)
--- a/drivers/pinctrl/tegra/pinctrl-tegra.h
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.h
@@ -54,6 +54,8 @@ enum tegra_pinconf_param {
        TEGRA_PINCONF_PARAM_SLEW_RATE_RISING,
        /* argument: Integer, range is HW-dependant */
        TEGRA_PINCONF_PARAM_DRIVE_TYPE,
+       /* argument: pinmux settings */
+       TEGRA_PINCONF_PARAM_FUNCTION,
 };
 
 enum tegra_pinconf_pull {