irqchip/gic(v3): Replace gic_irq() with irqd_to_hwirq()

GIC & GIC-v3 share same gic_irq() implementations, both of which serve
exact same purpose as irqd_to_hwirq(). irqd_to_hwirq() is a generic and
top level API of the interrupt subsystem, it's independent of any chip
implementation.

Replace gic_irq() with irqd_to_hwirq() and convert struct irq_data::hwirq
to irq_hw_number_t explicitly.

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Dawei Li <dawei.li@shingroup.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240122085716.2999875-3-dawei.li@shingroup.cn

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 65cbf378eec43696be7c9a383b63c73560e74e52..20a75f0353cde5b7e6732e25cba3f27faf177246 100644 (file)
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -181,11 +181,6 @@ static enum gic_intid_range get_intid_range(struct irq_data *d)
        return __get_intid_range(d->hwirq);
 }
 
-static inline unsigned int gic_irq(struct irq_data *d)
-{
-       return d->hwirq;
-}
-
 static inline bool gic_irq_in_rdist(struct irq_data *d)
 {
        switch (get_intid_range(d)) {
@@ -542,7 +537,7 @@ static int gic_irq_nmi_setup(struct irq_data *d)
         * A secondary irq_chip should be in charge of LPI request,
         * it should not be possible to get there
         */
-       if (WARN_ON(gic_irq(d) >= 8192))
+       if (WARN_ON(irqd_to_hwirq(d) >= 8192))
                return -EINVAL;
 
        /* desc lock should already be held */
@@ -582,7 +577,7 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
         * A secondary irq_chip should be in charge of LPI request,
         * it should not be possible to get there
         */
-       if (WARN_ON(gic_irq(d) >= 8192))
+       if (WARN_ON(irqd_to_hwirq(d) >= 8192))
                return;
 
        /* desc lock should already be held */
@@ -620,7 +615,7 @@ static bool gic_arm64_erratum_2941627_needed(struct irq_data *d)
 
 static void gic_eoi_irq(struct irq_data *d)
 {
-       write_gicreg(gic_irq(d), ICC_EOIR1_EL1);
+       write_gicreg(irqd_to_hwirq(d), ICC_EOIR1_EL1);
        isb();
 
        if (gic_arm64_erratum_2941627_needed(d)) {
@@ -640,19 +635,19 @@ static void gic_eoimode1_eoi_irq(struct irq_data *d)
         * No need to deactivate an LPI, or an interrupt that
         * is is getting forwarded to a vcpu.
         */
-       if (gic_irq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d))
+       if (irqd_to_hwirq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d))
                return;
 
        if (!gic_arm64_erratum_2941627_needed(d))
-               gic_write_dir(gic_irq(d));
+               gic_write_dir(irqd_to_hwirq(d));
        else
                gic_poke_irq(d, GICD_ICACTIVER);
 }
 
 static int gic_set_type(struct irq_data *d, unsigned int type)
 {
+       irq_hw_number_t irq = irqd_to_hwirq(d);
        enum gic_intid_range range;
-       unsigned int irq = gic_irq(d);
        void __iomem *base;
        u32 offset, index;
        int ret;
@@ -678,7 +673,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
        ret = gic_configure_irq(index, type, base + offset, NULL);
        if (ret && (range == PPI_RANGE || range == EPPI_RANGE)) {
                /* Misconfigured PPIs are usually not fatal */
-               pr_warn("GIC: PPI INTID%d is secure or misconfigured\n", irq);
+               pr_warn("GIC: PPI INTID%ld is secure or misconfigured\n", irq);
                ret = 0;
        }
 

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 412196a7dad587dca5773dcd71e6b2f9d3d95b5f..98aa383e39db1c274e871258635e218962076998 100644 (file)
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -162,11 +162,6 @@ static inline void __iomem *gic_cpu_base(struct irq_data *d)
        return gic_data_cpu_base(gic_data);
 }
 
-static inline unsigned int gic_irq(struct irq_data *d)
-{
-       return d->hwirq;
-}
-
 static inline bool cascading_gic_irq(struct irq_data *d)
 {
        void *data = irq_data_get_irq_handler_data(d);
@@ -183,14 +178,16 @@ static inline bool cascading_gic_irq(struct irq_data *d)
  */
 static void gic_poke_irq(struct irq_data *d, u32 offset)
 {
-       u32 mask = 1 << (gic_irq(d) % 32);
-       writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4);
+       u32 mask = 1 << (irqd_to_hwirq(d) % 32);
+
+       writel_relaxed(mask, gic_dist_base(d) + offset + (irqd_to_hwirq(d) / 32) * 4);
 }
 
 static int gic_peek_irq(struct irq_data *d, u32 offset)
 {
-       u32 mask = 1 << (gic_irq(d) % 32);
-       return !!(readl_relaxed(gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4) & mask);
+       u32 mask = 1 << (irqd_to_hwirq(d) % 32);
+
+       return !!(readl_relaxed(gic_dist_base(d) + offset + (irqd_to_hwirq(d) / 32) * 4) & mask);
 }
 
 static void gic_mask_irq(struct irq_data *d)
@@ -220,7 +217,7 @@ static void gic_unmask_irq(struct irq_data *d)
 
 static void gic_eoi_irq(struct irq_data *d)
 {
-       u32 hwirq = gic_irq(d);
+       irq_hw_number_t hwirq = irqd_to_hwirq(d);
 
        if (hwirq < 16)
                hwirq = this_cpu_read(sgi_intid);
@@ -230,7 +227,7 @@ static void gic_eoi_irq(struct irq_data *d)
 
 static void gic_eoimode1_eoi_irq(struct irq_data *d)
 {
-       u32 hwirq = gic_irq(d);
+       irq_hw_number_t hwirq = irqd_to_hwirq(d);
 
        /* Do not deactivate an IRQ forwarded to a vcpu. */
        if (irqd_is_forwarded_to_vcpu(d))
@@ -293,8 +290,8 @@ static int gic_irq_get_irqchip_state(struct irq_data *d,
 
 static int gic_set_type(struct irq_data *d, unsigned int type)
 {
+       irq_hw_number_t gicirq = irqd_to_hwirq(d);
        void __iomem *base = gic_dist_base(d);
-       unsigned int gicirq = gic_irq(d);
        int ret;
 
        /* Interrupt configuration for SGIs can't be changed */
@@ -309,7 +306,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
        ret = gic_configure_irq(gicirq, type, base + GIC_DIST_CONFIG, NULL);
        if (ret && gicirq < 32) {
                /* Misconfigured PPIs are usually not fatal */
-               pr_warn("GIC: PPI%d is secure or misconfigured\n", gicirq - 16);
+               pr_warn("GIC: PPI%ld is secure or misconfigured\n", gicirq - 16);
                ret = 0;
        }
 
@@ -319,7 +316,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
 static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
 {
        /* Only interrupts on the primary GIC can be forwarded to a vcpu. */
-       if (cascading_gic_irq(d) || gic_irq(d) < 16)
+       if (cascading_gic_irq(d) || irqd_to_hwirq(d) < 16)
                return -EINVAL;
 
        if (vcpu)
@@ -796,7 +793,7 @@ static void rmw_writeb(u8 bval, void __iomem *addr)
 static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
                            bool force)
 {
-       void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d);
+       void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + irqd_to_hwirq(d);
        struct gic_chip_data *gic = irq_data_get_irq_chip_data(d);
        unsigned int cpu;
 

diff --git a/include/linux/irq.h b/include/linux/irq.h
index 90081afa10ce529f053d97d094f65722c80b9efe..97baa937ab5b99fca75f4f707cfba14b0ba7b649 100644 (file)
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -179,7 +179,7 @@ struct irq_common_data {
 struct irq_data {
        u32                     mask;
        unsigned int            irq;
-       unsigned long           hwirq;
+       irq_hw_number_t         hwirq;
        struct irq_common_data  *common;
        struct irq_chip         *chip;
        struct irq_domain       *domain;