drm/amd/pm: smu7_hwmgr: fix potential off-by-one overflow in 'performance_levels'
authorAlexey Kodanev <aleksei.kodanev@bell-sw.com>
Tue, 4 Oct 2022 08:14:02 +0000 (11:14 +0300)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 10 Oct 2022 21:32:56 +0000 (17:32 -0400)
Since 'hardwareActivityPerformanceLevels' is set to the size of the
'performance_levels' array in smu7_hwmgr_backend_init(), using the
'<=' assertion to check for the next index value is incorrect.
Replace it with '<'.

Detected using the static analysis tool - Svace.
Fixes: 599a7e9fe1b6 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alexey Kodanev <aleksei.kodanev@bell-sw.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

index e4fcbf8a7eb5c887eae31a66323f4db33e291b61..7ef7e81525a30648746287e70336f548707799c8 100644 (file)
@@ -3603,7 +3603,7 @@ static int smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr,
                        return -EINVAL);
 
        PP_ASSERT_WITH_CODE(
-                       (smu7_power_state->performance_level_count <=
+                       (smu7_power_state->performance_level_count <
                                        hwmgr->platform_descriptor.hardwareActivityPerformanceLevels),
                        "Performance levels exceeds Driver limit!",
                        return -EINVAL);