* @seq:               timebase sequence counter
  * @clock_mode:                clock mode
  * @cycle_last:                timebase at clocksource init
+ * @max_cycles:                maximum cycles which won't overflow 64bit multiplication
  * @mask:              clocksource mask
  * @mult:              clocksource multiplier
  * @shift:             clocksource shift
 
        s32                     clock_mode;
        u64                     cycle_last;
+#ifdef CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT
+       u64                     max_cycles;
+#endif
        u64                     mask;
        u32                     mult;
        u32                     shift;
 
        u64 nsec, sec;
 
        vdata[CS_HRES_COARSE].cycle_last        = tk->tkr_mono.cycle_last;
+#ifdef CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT
+       vdata[CS_HRES_COARSE].max_cycles        = tk->tkr_mono.clock->max_cycles;
+#endif
        vdata[CS_HRES_COARSE].mask              = tk->tkr_mono.mask;
        vdata[CS_HRES_COARSE].mult              = tk->tkr_mono.mult;
        vdata[CS_HRES_COARSE].shift             = tk->tkr_mono.shift;
        vdata[CS_RAW].cycle_last                = tk->tkr_raw.cycle_last;
+#ifdef CONFIG_GENERIC_VDSO_OVERFLOW_PROTECT
+       vdata[CS_RAW].max_cycles                = tk->tkr_raw.clock->max_cycles;
+#endif
        vdata[CS_RAW].mask                      = tk->tkr_raw.mask;
        vdata[CS_RAW].mult                      = tk->tkr_raw.mult;
        vdata[CS_RAW].shift                     = tk->tkr_raw.shift;