arm64: dts: cavium: Fix GICv3 ITS nodes

The GICv3 ITS is an MSI controller, therefore its node name should be
'msi-controller'. The ITS node is also expected to have '#msi-cells'.
Add it on Thunder as there are no users. Thunder2 uses 'msi-parent', but
Robin says that should be 'msi-map' instead and I'm not sure what's
correct for it.

The unit-addresses of both the ITS and main GIC node on thunder2 are also
wrong, so fix them while we're here.

Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230208185506.2305349-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index e0a71795261b826c5ffa5efb22df6736036ffe7a..8ad31dee11a3c10e20e8d32ad6530d2f56dda9c0 100644 (file)
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -389,9 +389,10 @@
                              <0x8010 0x80000000 0x0 0x600000>; /* GICR */
                        interrupts = <1 9 0xf04>;
 
-                       its: gic-its@8010,00020000 {
+                       its: msi-controller@801000020000 {
                                compatible = "arm,gic-v3-its";
                                msi-controller;
+                               #msi-cells = <1>;
                                reg = <0x8010 0x20000 0x0 0x200000>;
                        };
                };

diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
index dfb41705a9a935b9df5353e9d485feff1ddda832..3419bd252696c41e63735a40107822f4517b1296 100644 (file)
--- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi
@@ -55,7 +55,7 @@
                method = "smc";
        };
 
-       gic: interrupt-controller@400080000 {
+       gic: interrupt-controller@4000080000 {
                compatible = "arm,gic-v3";
                #interrupt-cells = <3>;
                #address-cells = <2>;
@@ -67,7 +67,7 @@
                      <0x04 0x01000000 0x0 0x1000000>;  /* GICR */
                interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 
-               gicits: gic-its@40010000 {
+               gicits: msi-controller@4000100000 {
                        compatible = "arm,gic-v3-its";
                        msi-controller;
                        reg = <0x04 0x00100000 0x0 0x20000>;    /* GIC ITS */