irqchip/qcom-pdc: Drop open coded version of __assign_bit()

The driver uses what looks like an open-coded version of __assign_bit().
Replace it with the real thing.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Maulik Shah <quic_mkshah@quicinc.com>
Link: https://lore.kernel.org/r/20220224101226.88373-6-maz@kernel.org

diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index 0cd20ddfae2a13ee9a7aab9dcbb0b242f19fcccc..d96916cf6a414f00344c53b289f727aad0e86323 100644 (file)
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -23,9 +23,6 @@
 
 #define PDC_MAX_GPIO_IRQS      256
 
-#define CLEAR_INTR(reg, intr)  (reg & ~(1 << intr))
-#define ENABLE_INTR(reg, intr) (reg | (1 << intr))
-
 #define IRQ_ENABLE_BANK                0x10
 #define IRQ_i_CFG              0x110
 
@@ -55,16 +52,16 @@ static u32 pdc_reg_read(int reg, u32 i)
 static void pdc_enable_intr(struct irq_data *d, bool on)
 {
        int pin_out = d->hwirq;
+       unsigned long enable;
        unsigned long flags;
        u32 index, mask;
-       u32 enable;
 
        index = pin_out / 32;
        mask = pin_out % 32;
 
        raw_spin_lock_irqsave(&pdc_lock, flags);
        enable = pdc_reg_read(IRQ_ENABLE_BANK, index);
-       enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask);
+       __assign_bit(mask, &enable, on);
        pdc_reg_write(IRQ_ENABLE_BANK, index, enable);
        raw_spin_unlock_irqrestore(&pdc_lock, flags);
 }