spinlock_t ctrl_lock;
        const struct sun4i_pwm_data *data;
        unsigned long next_period[2];
-       bool needs_delay[2];
 };
 
 static inline struct sun4i_pwm_chip *to_sun4i_pwm_chip(struct pwm_chip *chip)
        sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
        sun4i_pwm->next_period[pwm->hwpwm] = jiffies +
                usecs_to_jiffies(cstate.period / 1000 + 1);
-       sun4i_pwm->needs_delay[pwm->hwpwm] = true;
 
        if (state->polarity != PWM_POLARITY_NORMAL)
                ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
 
        if (state->enabled) {
                ctrl |= BIT_CH(PWM_EN, pwm->hwpwm);
-       } else if (!sun4i_pwm->needs_delay[pwm->hwpwm]) {
+       } else {
                ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm);
                ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
        }
        if (state->enabled)
                return 0;
 
-       if (!sun4i_pwm->needs_delay[pwm->hwpwm]) {
-               clk_disable_unprepare(sun4i_pwm->clk);
-               return 0;
-       }
-
        /* We need a full period to elapse before disabling the channel. */
        now = jiffies;
-       if (sun4i_pwm->needs_delay[pwm->hwpwm] &&
-           time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) {
+       if (time_before(now, sun4i_pwm->next_period[pwm->hwpwm])) {
                delay_us = jiffies_to_usecs(sun4i_pwm->next_period[pwm->hwpwm] -
                                           now);
                if ((delay_us / 500) > MAX_UDELAY_MS)
                else
                        usleep_range(delay_us, delay_us * 2);
        }
-       sun4i_pwm->needs_delay[pwm->hwpwm] = false;
 
        spin_lock(&sun4i_pwm->ctrl_lock);
        ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);