clocksource: extend the max_delta_ns of timer-riscv and timer-clint to ULONG_MAX

When registering the riscv-timer or clint-timer as a clock_event device,
the driver needs to specify the value of max_delta_ticks. This value
directly influences the max_delta_ns, which represents the maximum time
interval for configuring subsequent clock events. Currently, both
riscv-timer and clint-timer are set with a max_delta_ticks value of
0x7fff_ffff. When the timer operates at a high frequency, this values
limists the system to sleep only for a short time. For the 1GHz case,
the sleep cannot exceed two seconds. To address this limitation, refer to
other timer implementations to extend it to 2^(bit-width of the timer) - 1.
Because the bit-width of $mtimecmp is 64bit, this value becomes ULONG_MAX
(0xffff_ffff_ffff_ffff).

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Link: https://lore.kernel.org/r/20230905070945.404653-1-vincent.chen@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index 9a55e733ae995dc6d734e9eb14dee295cd59b230..09fd292eb83df06d5ba32ec7e1c1671e42be5217 100644 (file)
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -131,7 +131,7 @@ static int clint_timer_starting_cpu(unsigned int cpu)
        struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu);
 
        ce->cpumask = cpumask_of(cpu);
-       clockevents_config_and_register(ce, clint_timer_freq, 100, 0x7fffffff);
+       clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX);
 
        enable_percpu_irq(clint_timer_irq,
                          irq_get_trigger_type(clint_timer_irq));

diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index e66dcbd6656658dd32f913189fceebda87e8ccbf..87a7ac0ce6cec46e4b00fa06a90402f4e2ced9de 100644 (file)
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -114,7 +114,7 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
                ce->features |= CLOCK_EVT_FEAT_C3STOP;
        if (static_branch_likely(&riscv_sstc_available))
                ce->rating = 450;
-       clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);
+       clockevents_config_and_register(ce, riscv_timebase, 100, ULONG_MAX);
 
        enable_percpu_irq(riscv_clock_event_irq,
                          irq_get_trigger_type(riscv_clock_event_irq));