target/arm: Check VSTCR.SW when assigning the stage 2 output PA space
authorIdan Horowitz <idan.horowitz@gmail.com>
Fri, 1 Apr 2022 14:35:49 +0000 (15:35 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 1 Apr 2022 14:35:49 +0000 (15:35 +0100)
As per the AArch64.SS2OutputPASpace() psuedo-code in the ARMv8 ARM when the
PA space of the IPA is non secure, the output PA space is secure if and only
if all of the bits VTCR.<NSW, NSA>, VSTCR.<SW, SA> are not set.

Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220327093427.1548629-2-idan.horowitz@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/helper.c

index 3aeaea406837eac9be5f42eef36241dcb0163fd8..a65b39625db8b193971c01b7d2c7c63f2287fd4e 100644 (file)
@@ -12697,7 +12697,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
                 } else {
                     attrs->secure =
                         !((env->cp15.vtcr_el2.raw_tcr & (VTCR_NSA | VTCR_NSW))
-                        || (env->cp15.vstcr_el2.raw_tcr & VSTCR_SA));
+                        || (env->cp15.vstcr_el2.raw_tcr & (VSTCR_SA | VSTCR_SW)));
                 }
             }
             return 0;