phy: qcom-qmp-pcie-msm8996: drop unused in-layout configuration

The MSM8996 QMP PCIe PHY driver no longer uses the "in-layout"
configuration macro to configure registers that are typically accessed
using "regs_layout" arrays (e.g. QPHY_START_CTRL) so drop this unused
feature.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221012081241.18273-6-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
index 8b74948eb467d50e514b64fd577e5bd59a3a439a..31ac405d3785a0f091ad475193cfd9e741800e85 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
@@ -46,11 +46,6 @@
 struct qmp_phy_init_tbl {
        unsigned int offset;
        unsigned int val;
-       /*
-        * register part of layout ?
-        * if yes, then offset gives index in the reg-layout
-        */
-       bool in_layout;
        /*
         * mask of lanes for which this register is written
         * for cases when second lane needs different values
@@ -65,14 +60,6 @@ struct qmp_phy_init_tbl {
                .lane_mask = 0xff,      \
        }
 
-#define QMP_PHY_INIT_CFG_L(o, v)       \
-       {                               \
-               .offset = o,            \
-               .val = v,               \
-               .in_layout = true,      \
-               .lane_mask = 0xff,      \
-       }
-
 #define QMP_PHY_INIT_CFG_LANE(o, v, l) \
        {                               \
                .offset = o,            \
@@ -346,7 +333,6 @@ static const struct qmp_phy_cfg msm8996_pciephy_cfg = {
 };
 
 static void qmp_pcie_msm8996_configure_lane(void __iomem *base,
-                                       const unsigned int *regs,
                                        const struct qmp_phy_init_tbl tbl[],
                                        int num,
                                        u8 lane_mask)
@@ -361,19 +347,15 @@ static void qmp_pcie_msm8996_configure_lane(void __iomem *base,
                if (!(t->lane_mask & lane_mask))
                        continue;
 
-               if (t->in_layout)
-                       writel(t->val, base + regs[t->offset]);
-               else
-                       writel(t->val, base + t->offset);
+               writel(t->val, base + t->offset);
        }
 }
 
 static void qmp_pcie_msm8996_configure(void __iomem *base,
-                                  const unsigned int *regs,
                                   const struct qmp_phy_init_tbl tbl[],
                                   int num)
 {
-       qmp_pcie_msm8996_configure_lane(base, regs, tbl, num, 0xff);
+       qmp_pcie_msm8996_configure_lane(base, tbl, num, 0xff);
 }
 
 static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy)
@@ -387,7 +369,7 @@ static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy)
        unsigned int mask, val;
        int ret;
 
-       qmp_pcie_msm8996_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
+       qmp_pcie_msm8996_configure(serdes, serdes_tbl, serdes_tbl_num);
 
        qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET);
        qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
@@ -531,13 +513,9 @@ static int qmp_pcie_msm8996_power_on(struct phy *phy)
        }
 
        /* Tx, Rx, and PCS configurations */
-       qmp_pcie_msm8996_configure_lane(tx, cfg->regs, cfg->tx_tbl,
-                                       cfg->tx_tbl_num, 1);
-
-       qmp_pcie_msm8996_configure_lane(rx, cfg->regs, cfg->rx_tbl,
-                                       cfg->rx_tbl_num, 1);
-
-       qmp_pcie_msm8996_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
+       qmp_pcie_msm8996_configure_lane(tx, cfg->tx_tbl, cfg->tx_tbl_num, 1);
+       qmp_pcie_msm8996_configure_lane(rx, cfg->rx_tbl, cfg->rx_tbl_num, 1);
+       qmp_pcie_msm8996_configure(pcs, cfg->pcs_tbl, cfg->pcs_tbl_num);
 
        /*
         * Pull out PHY from POWER DOWN state.