ath10k: Fix the MTU size on QCA9377 SDIO
authorFabio Estevam <festevam@denx.de>
Wed, 24 Nov 2021 13:10:47 +0000 (10:10 -0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 10:03:30 +0000 (11:03 +0100)
[ Upstream commit 09b8cd69edcf2be04a781e1781e98e52a775c9ad ]

On an imx6dl-pico-pi board with a QCA9377 SDIO chip, simply trying to
connect via ssh to another machine causes:

[   55.824159] ath10k_sdio mmc1:0001:1: failed to transmit packet, dropping: -12
[   55.832169] ath10k_sdio mmc1:0001:1: failed to submit frame: -12
[   55.838529] ath10k_sdio mmc1:0001:1: failed to push frame: -12
[   55.905863] ath10k_sdio mmc1:0001:1: failed to transmit packet, dropping: -12
[   55.913650] ath10k_sdio mmc1:0001:1: failed to submit frame: -12
[   55.919887] ath10k_sdio mmc1:0001:1: failed to push frame: -12

, leading to an ssh connection failure.

One user inspected the size of frames on Wireshark and reported
the followig:

"I was able to narrow the issue down to the mtu. If I set the mtu for
the wlan0 device to 1486 instead of 1500, the issue does not happen.

The size of frames that I see on Wireshark is exactly 1500 after
setting it to 1486."

Clearing the HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE avoids the problem and
the ssh command works successfully after that.

Introduce a 'credit_size_workaround' field to ath10k_hw_params for
the QCA9377 SDIO, so that the HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE
is not set in this case.

Tested with QCA9377 SDIO with firmware WLAN.TF.1.1.1-00061-QCATFSWPZ-1.

Fixes: 2f918ea98606 ("ath10k: enable alt data of TX path for sdio")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20211124131047.713756-1-festevam@denx.de
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/hw.h

index 64c7145b51a2e9ee0e499a0ff714e70f65b7f6ab..58e86e662ab8387880556d3acc9337cbfc14827c 100644 (file)
@@ -89,6 +89,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = true,
                .dynamic_sar_support = false,
        },
@@ -124,6 +125,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = true,
                .dynamic_sar_support = false,
        },
@@ -160,6 +162,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -190,6 +193,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_wds_entries = 0x20,
                .uart_pin_workaround = true,
                .tx_stats_over_pktlog = false,
+               .credit_size_workaround = false,
                .bmi_large_size_download = true,
                .supports_peer_stats_info = true,
                .dynamic_sar_support = true,
@@ -226,6 +230,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -261,6 +266,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -296,6 +302,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -334,6 +341,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = true,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .supports_peer_stats_info = true,
                .dynamic_sar_support = true,
@@ -376,6 +384,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -424,6 +433,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -469,6 +479,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -504,6 +515,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -541,6 +553,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = true,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -570,6 +583,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
                .uart_pin_workaround = true,
+               .credit_size_workaround = true,
                .dynamic_sar_support = false,
        },
        {
@@ -611,6 +625,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = false,
                .hw_filter_reset_required = true,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = false,
        },
@@ -639,6 +654,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .rri_on_ddr = true,
                .hw_filter_reset_required = false,
                .fw_diag_ce_download = false,
+               .credit_size_workaround = false,
                .tx_stats_over_pktlog = false,
                .dynamic_sar_support = true,
        },
@@ -714,6 +730,7 @@ static void ath10k_send_suspend_complete(struct ath10k *ar)
 
 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 {
+       bool mtu_workaround = ar->hw_params.credit_size_workaround;
        int ret;
        u32 param = 0;
 
@@ -731,7 +748,7 @@ static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
 
        param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
 
-       if (mode == ATH10K_FIRMWARE_MODE_NORMAL)
+       if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
                param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
        else
                param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
index 6b03c7787e36a95bb0ed5020473f89905e36a913..591ef7416b613185c7dda4cbe53cb26c456a18ba 100644 (file)
@@ -618,6 +618,9 @@ struct ath10k_hw_params {
         */
        bool uart_pin_workaround;
 
+       /* Workaround for the credit size calculation */
+       bool credit_size_workaround;
+
        /* tx stats support over pktlog */
        bool tx_stats_over_pktlog;