drm/amd/pm: fix the failure when change power profile for renoir
authorXiaojian Du <Xiaojian.Du@amd.com>
Wed, 30 Dec 2020 10:08:23 +0000 (18:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 5 Jan 2021 16:33:26 +0000 (11:33 -0500)
This patch is to fix the failure when change power profile to
"profile_peak" for renoir.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c

index 801e7854e8db300d19b9a410144d94826fb5be02..e44fd23ffe0608acd714926f9788a0554f817f26 100644 (file)
@@ -188,6 +188,7 @@ static int renoir_get_dpm_clk_limited(struct smu_context *smu, enum smu_clk_type
                        return -EINVAL;
                *freq = clk_table->SocClocks[dpm_level].Freq;
                break;
+       case SMU_UCLK:
        case SMU_MCLK:
                if (dpm_level >= NUM_FCLK_DPM_LEVELS)
                        return -EINVAL;
index 522d5500465557cc9d911177b00e5c7e4eb28f48..06abf2a7ce9e9e0f7f116f5c36223f5264d838b3 100644 (file)
@@ -225,6 +225,7 @@ int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_
        break;
        case SMU_FCLK:
        case SMU_MCLK:
+       case SMU_UCLK:
                ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetHardMinFclkByFreq, min, NULL);
                if (ret)
                        return ret;