// enable-active-high;
        };
 
+       cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
+               compatible = "regulator-fixed";
+               regulator-name = "CAM0_DVDD_1V2";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               enable-active-high;
+               gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
+               vin-supply = <&vbat>;
+       };
+
+       cam0_avdd_2v8: reg_cam0_avdd_2v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "CAM0_AVDD_2V8";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               enable-active-high;
+               gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&cam0_avdd_2v8_en_default>;
+               vin-supply = <&vbat>;
+       };
+
+       /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
+       cam3_avdd_2v8: reg_cam3_avdd_2v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "CAM3_AVDD_2V8";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               regulator-always-on;
+               vin-supply = <&vbat>;
+       };
+
        pcie0_3p3v_dual: vldo-3v3-regulator {
                compatible = "regulator-fixed";
                regulator-name = "VLDO_3V3";
                "OPTION2",
                "PM845_SLB";
 
+       cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
+               pins = "gpio12";
+               function = "normal";
+
+               bias-pull-up;
+               drive-push-pull;
+               qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+       };
+
+       cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
+               pins = "gpio10";
+               function = "normal";
+
+               bias-pull-up;
+               drive-push-pull;
+               qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+       };
+
        vol_up_pin_a: vol-up-active {
                pins = "gpio6";
                function = "normal";
 };
 
 &tlmm {
+       cam0_default: cam0_default {
+               rst {
+                       pins = "gpio9";
+                       function = "gpio";
+
+                       drive-strength = <16>;
+                       bias-disable;
+               };
+
+               mclk0 {
+                       pins = "gpio13";
+                       function = "cam_mclk";
+
+                       drive-strength = <16>;
+                       bias-disable;
+               };
+       };
+
+       cam3_default: cam3_default {
+               rst {
+                       function = "gpio";
+                       pins = "gpio21";
+
+                       drive-strength = <16>;
+                       bias-disable;
+               };
+
+               mclk3 {
+                       function = "cam_mclk";
+                       pins = "gpio16";
+
+                       drive-strength = <16>;
+                       bias-disable;
+               };
+       };
+
        pcie0_default_state: pcie0-default {
                clkreq {
                        pins = "gpio36";
        };
 };
 
+&pm8998_gpio {
+
+};
+
 &cci {
        status = "ok";
 };
+
+&cci_i2c0 {
+       camera@10 {
+               compatible = "ovti,ov8856";
+               reg = <0x10>;
+
+               // CAM0_RST_N
+               reset-gpios = <&tlmm 9 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&cam0_default>;
+               gpios = <&tlmm 13 0>,
+                       <&tlmm 9 0>;
+
+               clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+               clock-names = "xvclk";
+               clock-frequency = <19200000>;
+
+               /* The &vreg_s4a_1p8 trace is powered on as a,
+                * so it is represented by a fixed regulator.
+                *
+                * The 2.8V vdda-supply and 1.2V vddd-supply regulators
+                * both have to be enabled through the power management
+                * gpios.
+                */
+               power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+               dovdd-supply = <&vreg_lvs1a_1p8>;
+               avdd-supply = <&cam0_avdd_2v8>;
+               dvdd-supply = <&cam0_dvdd_1v2>;
+
+               status = "disable";
+
+               port {
+                       ov8856_ep: endpoint {
+                               clock-lanes = <1>;
+                               link-frequencies = /bits/ 64
+                                       <360000000 180000000>;
+                               data-lanes = <1 2 3 4>;
+//                             remote-endpoint = <&csiphy0_ep>;
+                       };
+               };
+       };
+};
+
+&cci_i2c1 {
+       camera@60 {
+               compatible = "ovti,ov7251";
+
+               // I2C address as per ov7251.txt linux documentation
+               reg = <0x60>;
+
+               // CAM3_RST_N
+               enable-gpios = <&tlmm 21 0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&cam3_default>;
+               gpios = <&tlmm 16 0>,
+                       <&tlmm 21 0>;
+
+               clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
+               clock-names = "xclk";
+               clock-frequency = <24000000>;
+
+               /* The &vreg_s4a_1p8 trace always powered on.
+                *
+                * The 2.8V vdda-supply regulator is enabled when the
+                * vreg_s4a_1p8 trace is pulled high.
+                * It too is represented by a fixed regulator.
+                *
+                * No 1.2V vddd-supply regulator is used.
+                */
+               power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+               vdddo-supply = <&vreg_lvs1a_1p8>;
+               vdda-supply = <&cam3_avdd_2v8>;
+
+               status = "disable";
+
+               port {
+                       ov7251_ep: endpoint {
+                               clock-lanes = <1>;
+                               data-lanes = <0 1>;
+//                             remote-endpoint = <&csiphy3_ep>;
+                       };
+               };
+       };
+};