arm64: dts: rockchip: Enable USB3 Ethernet on rk3328 NanoPi R2S
authorChen-Yu Tsai <wens@csie.org>
Tue, 4 May 2021 08:36:16 +0000 (16:36 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 9 May 2021 23:52:45 +0000 (01:52 +0200)
The NanoPi R2S has a Realtek RTL8153B USB 3.0 Ethernet chip connected
to the USB 3.0 pins of the RK3328 SoC. Power to the chip is controlled
by a GPIO line toggled transistor switch, which is not a full-blown
voltage regulator.

At least in Linux, the USB 3.0 XHCI controller has two ports: the first
port is for legacy USB 2.0 and slower, while the second port is for USB
3.0. Since the Ethernet chip supports USB 3.0, it should be described
as connected to the second port.

Add the device nodes for the power switch and Ethernet chip, and enable
the USB 3.0 controller. The USB device node follows the standard USB
device binding.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210504083616.9654-5-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts

index f807bc066ccb9c085d6be7e085a5bf993c07e0f3..64cf07ee3d10cb39cad98c529db475131336e8d1 100644 (file)
@@ -14,6 +14,7 @@
        compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
 
        aliases {
+               ethernet1 = &rtl8153;
                mmc0 = &sdmmc;
        };
 
                regulator-min-microvolt = <5000000>;
                regulator-max-microvolt = <5000000>;
        };
+
+       vdd_5v_lan: vdd-5v-lan {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+               pinctrl-0 = <&lan_vdd_pin>;
+               pinctrl-names = "default";
+               regulator-name = "vdd_5v_lan";
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&vdd_5v>;
+       };
 };
 
 &cpu0 {
                };
        };
 
+       lan {
+               lan_vdd_pin: lan-vdd-pin {
+                       rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        pmic {
                pmic_int_l: pmic-int-l {
                        rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
        dr_mode = "host";
 };
 
+&usbdrd3 {
+       dr_mode = "host";
+       status = "okay";
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       /* Second port is for USB 3.0 */
+       rtl8153: device@2 {
+               compatible = "usbbda,8153";
+               reg = <2>;
+       };
+};
+
 &usb_host0_ehci {
        status = "okay";
 };