arm64: dts: rockchip: Fix power-controller node names for px30
authorElaine Zhang <zhangqing@rock-chips.com>
Sat, 17 Apr 2021 11:29:42 +0000 (13:29 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 10 May 2021 07:31:46 +0000 (09:31 +0200)
Use more generic names (as recommended in the device tree specification
or the binding documentation)

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/px30.dtsi

index 86644e24aa5f23d48aba92c6589e9846d72cc9fa..bcbe35a0f0eb40b027934a594a888975e514a995 100644 (file)
                        #size-cells = <0>;
 
                        /* These power domains are grouped by VD_LOGIC */
-                       pd_usb@PX30_PD_USB {
+                       power-domain@PX30_PD_USB {
                                reg = <PX30_PD_USB>;
                                clocks = <&cru HCLK_HOST>,
                                         <&cru HCLK_OTG>,
                                         <&cru SCLK_OTG_ADP>;
                                pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
                        };
-                       pd_sdcard@PX30_PD_SDCARD {
+                       power-domain@PX30_PD_SDCARD {
                                reg = <PX30_PD_SDCARD>;
                                clocks = <&cru HCLK_SDMMC>,
                                         <&cru SCLK_SDMMC>;
                                pm_qos = <&qos_sdmmc>;
                        };
-                       pd_gmac@PX30_PD_GMAC {
+                       power-domain@PX30_PD_GMAC {
                                reg = <PX30_PD_GMAC>;
                                clocks = <&cru ACLK_GMAC>,
                                         <&cru PCLK_GMAC>,
                                         <&cru SCLK_GMAC_RX_TX>;
                                pm_qos = <&qos_gmac>;
                        };
-                       pd_mmc_nand@PX30_PD_MMC_NAND {
+                       power-domain@PX30_PD_MMC_NAND {
                                reg = <PX30_PD_MMC_NAND>;
                                clocks =  <&cru HCLK_NANDC>,
                                          <&cru HCLK_EMMC>,
                                pm_qos = <&qos_emmc>, <&qos_nand>,
                                         <&qos_sdio>, <&qos_sfc>;
                        };
-                       pd_vpu@PX30_PD_VPU {
+                       power-domain@PX30_PD_VPU {
                                reg = <PX30_PD_VPU>;
                                clocks = <&cru ACLK_VPU>,
                                         <&cru HCLK_VPU>,
                                         <&cru SCLK_CORE_VPU>;
                                pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
                        };
-                       pd_vo@PX30_PD_VO {
+                       power-domain@PX30_PD_VO {
                                reg = <PX30_PD_VO>;
                                clocks = <&cru ACLK_RGA>,
                                         <&cru ACLK_VOPB>,
                                pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
                                         <&qos_vop_m0>, <&qos_vop_m1>;
                        };
-                       pd_vi@PX30_PD_VI {
+                       power-domain@PX30_PD_VI {
                                reg = <PX30_PD_VI>;
                                clocks = <&cru ACLK_CIF>,
                                         <&cru ACLK_ISP>,
                                         <&qos_isp_wr>, <&qos_isp_m1>,
                                         <&qos_vip>;
                        };
-                       pd_gpu@PX30_PD_GPU {
+                       power-domain@PX30_PD_GPU {
                                reg = <PX30_PD_GPU>;
                                clocks = <&cru SCLK_GPU>;
                                pm_qos = <&qos_gpu>;