phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate
authorZheng Yang <zhengyang@rock-chips.com>
Thu, 15 Jun 2023 17:10:19 +0000 (17:10 +0000)
committerVinod Koul <vkoul@kernel.org>
Wed, 12 Jul 2023 16:57:43 +0000 (22:27 +0530)
inno_hdmi_phy_rk3328_clk_recalc_rate() is returning a rate not found
in the pre pll config table when the fractal divider is used.
This can prevent proper power_on because a tmdsclock for the new rate
is not found in the pre pll config table.

Fix this by saving and returning a rounded pixel rate that exist
in the pre pll config table.

Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy")
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20230615171005.2251032-3-jonas@kwiboo.se
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c

index f348e5347d8174a33f76612d477f4c39da0b9cab..7d412f771f6c3d986b1065770bee95ae07b3274b 100644 (file)
@@ -745,10 +745,12 @@ unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct clk_hw *hw,
                do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2));
        }
 
-       inno->pixclock = vco;
-       dev_dbg(inno->dev, "%s rate %lu\n", __func__, inno->pixclock);
+       inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000;
 
-       return vco;
+       dev_dbg(inno->dev, "%s rate %lu vco %llu\n",
+               __func__, inno->pixclock, vco);
+
+       return inno->pixclock;
 }
 
 static long inno_hdmi_phy_rk3328_clk_round_rate(struct clk_hw *hw,