pwm: lpss: Add a comment to the bypass field
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 27 Sep 2022 16:24:21 +0000 (19:24 +0300)
committerThierry Reding <thierry.reding@gmail.com>
Wed, 28 Sep 2022 14:21:46 +0000 (16:21 +0200)
Add a comment to the bypass field based on the commit b997e3edca4f
("pwm: lpss: Set enable-bit before waiting for update-bit
to go low").

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
drivers/pwm/pwm-lpss.h

index c344921b2cabcabe2de4d279b047a8dfb1aef9a3..8e82eb5a7e009159004eb58f62cffab1031234f8 100644 (file)
@@ -25,6 +25,11 @@ struct pwm_lpss_boardinfo {
        unsigned long clk_rate;
        unsigned int npwm;
        unsigned long base_unit_bits;
+       /*
+        * Some versions of the IP may stuck in the state machine if enable
+        * bit is not set, and hence update bit will show busy status till
+        * the reset. For the rest it may be otherwise.
+        */
        bool bypass;
        /*
         * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device