Next attempt to get the lui sign extension right.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-mips/op_template.c b/target-mips/op_template.c
index 8d4c4e40487c3ebaf2f6222be363faa7e6fe11b9..04677cd840b0614b2190b1b7a4072209a225b837 100644 (file)
--- a/target-mips/op_template.c
+++ b/target-mips/op_template.c
@@ -54,7 +54,7 @@ void glue(op_load_gpr_T2_gpr, REG) (void)
 #define SET_RESET(treg, tregname)        \
     void glue(op_set, tregname)(void)    \
     {                                    \
-        treg = PARAM1;                   \
+        treg = (int32_t)PARAM1;          \
         RETURN();                        \
     }                                    \
     void glue(op_reset, tregname)(void)  \

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 96a0f37d276de477b9ed09696230fafce1e478f6..06581f2cc6317ce63a5a48d10ba2a4b768590d5c 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -907,8 +907,7 @@ static void gen_arith_imm (DisasContext *ctx, uint32_t opc, int rt,
         GEN_LOAD_IMM_TN(T1, uimm);
         break;
     case OPC_LUI:
-        uimm =  (int32_t)(imm << 16);
-        GEN_LOAD_IMM_TN(T0, uimm);
+        GEN_LOAD_IMM_TN(T0, uimm << 16);
         break;
     case OPC_SLL:
     case OPC_SRA: