POSTING_READ(VLV_IER);
 }
 
+static void gen8_gt_irq_reset(struct drm_i915_private *dev_priv)
+{
+       GEN8_IRQ_RESET_NDX(GT, 0);
+       GEN8_IRQ_RESET_NDX(GT, 1);
+       GEN8_IRQ_RESET_NDX(GT, 2);
+       GEN8_IRQ_RESET_NDX(GT, 3);
+}
+
 static void gen8_irq_reset(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        I915_WRITE(GEN8_MASTER_IRQ, 0);
        POSTING_READ(GEN8_MASTER_IRQ);
 
-       GEN8_IRQ_RESET_NDX(GT, 0);
-       GEN8_IRQ_RESET_NDX(GT, 1);
-       GEN8_IRQ_RESET_NDX(GT, 2);
-       GEN8_IRQ_RESET_NDX(GT, 3);
+       gen8_gt_irq_reset(dev_priv);
 
        for_each_pipe(pipe)
                GEN8_IRQ_RESET_NDX(DE_PIPE, pipe);
        I915_WRITE(GEN8_MASTER_IRQ, 0);
        POSTING_READ(GEN8_MASTER_IRQ);
 
-       GEN8_IRQ_RESET_NDX(GT, 0);
-       GEN8_IRQ_RESET_NDX(GT, 1);
-       GEN8_IRQ_RESET_NDX(GT, 2);
-       GEN8_IRQ_RESET_NDX(GT, 3);
+       gen8_gt_irq_reset(dev_priv);
 
        GEN5_IRQ_RESET(GEN8_PCU_);