ARM: dts: rockchip: change gpio nodenames
authorJohan Jonker <jbx6244@gmail.com>
Thu, 7 Oct 2021 14:40:18 +0000 (16:40 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 17 Oct 2021 07:50:28 +0000 (09:50 +0200)
Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211007144019.7461-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3036.dtsi
arch/arm/boot/dts/rk3066a.dtsi
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/rk322x.dtsi
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/rv1108.dtsi

index 6864b8668ec034f9cd1d0d4ae8c61b356df01691..ba2b8891bbb776b62428e7d79080b01aad7c4e7c 100644 (file)
                #size-cells = <1>;
                ranges;
 
-               gpio0: gpio0@2007c000 {
+               gpio0: gpio@2007c000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x2007c000 0x100>;
                        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@20080000 {
+               gpio1: gpio@20080000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20080000 0x100>;
                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@20084000 {
+               gpio2: gpio@20084000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20084000 0x100>;
                        interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
index cc701a4e046df2526fad7744f51803f53dfdb801..94982894fbeeff0518d70505ca503e9788ebee34 100644 (file)
                #size-cells = <1>;
                ranges;
 
-               gpio0: gpio0@20034000 {
+               gpio0: gpio@20034000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20034000 0x100>;
                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@2003c000 {
+               gpio1: gpio@2003c000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x2003c000 0x100>;
                        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@2003e000 {
+               gpio2: gpio@2003e000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x2003e000 0x100>;
                        interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@20080000 {
+               gpio3: gpio@20080000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20080000 0x100>;
                        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio4: gpio4@20084000 {
+               gpio4: gpio@20084000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20084000 0x100>;
                        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio6: gpio6@2000a000 {
+               gpio6: gpio@2000a000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x2000a000 0x100>;
                        interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
index d6a946a2a92a9293a7836eb072d2cb028ff9e49a..d294c0f0f08c5af910d990151593bcbcc85982b7 100644 (file)
                #size-cells = <1>;
                ranges;
 
-               gpio0: gpio0@2000a000 {
+               gpio0: gpio@2000a000 {
                        compatible = "rockchip,rk3188-gpio-bank0";
                        reg = <0x2000a000 0x100>;
                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@2003c000 {
+               gpio1: gpio@2003c000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x2003c000 0x100>;
                        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@2003e000 {
+               gpio2: gpio@2003e000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x2003e000 0x100>;
                        interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@20080000 {
+               gpio3: gpio@20080000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20080000 0x100>;
                        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
index dea025a6469f8c3215081aac610a04a02b702a0c..8eed9e3a92e901b6c2769e38224423de1be950da 100644 (file)
                #size-cells = <1>;
                ranges;
 
-               gpio0: gpio0@11110000 {
+               gpio0: gpio@11110000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x11110000 0x100>;
                        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@11120000 {
+               gpio1: gpio@11120000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x11120000 0x100>;
                        interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@11130000 {
+               gpio2: gpio@11130000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x11130000 0x100>;
                        interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@11140000 {
+               gpio3: gpio@11140000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x11140000 0x100>;
                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
index 1ded2aabeb1173f6b87ea92eafc4da8f736b3f91..aaaa61875701d916bd75ab032c655bf208d3b3df 100644 (file)
                #size-cells = <2>;
                ranges;
 
-               gpio0: gpio0@ff750000 {
+               gpio0: gpio@ff750000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff750000 0x0 0x100>;
                        interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@ff780000 {
+               gpio1: gpio@ff780000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff780000 0x0 0x100>;
                        interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@ff790000 {
+               gpio2: gpio@ff790000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff790000 0x0 0x100>;
                        interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@ff7a0000 {
+               gpio3: gpio@ff7a0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7a0000 0x0 0x100>;
                        interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio4: gpio4@ff7b0000 {
+               gpio4: gpio@ff7b0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7b0000 0x0 0x100>;
                        interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio5: gpio5@ff7c0000 {
+               gpio5: gpio@ff7c0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7c0000 0x0 0x100>;
                        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio6: gpio6@ff7d0000 {
+               gpio6: gpio@ff7d0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7d0000 0x0 0x100>;
                        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio7: gpio7@ff7e0000 {
+               gpio7: gpio@ff7e0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7e0000 0x0 0x100>;
                        interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio8: gpio8@ff7f0000 {
+               gpio8: gpio@ff7f0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7f0000 0x0 0x100>;
                        interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
index 668fb15137cce52aab13867545dbcf7cf9dfafbc..44825490645259ec9b09991befc8bc8b17080b0a 100644 (file)
                #size-cells = <1>;
                ranges;
 
-               gpio0: gpio0@20030000 {
+               gpio0: gpio@20030000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x20030000 0x100>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@10310000 {
+               gpio1: gpio@10310000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x10310000 0x100>;
                        interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@10320000 {
+               gpio2: gpio@10320000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x10320000 0x100>;
                        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@10330000 {
+               gpio3: gpio@10330000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x10330000 0x100>;
                        interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;