The runtime enabling of the ISPCK (internally clocks the pipeline inside
the ISC) has to be done after the pm_runtime for the ISC dev has been
started.
After the commit by Mauro:
the ISC failed to probe with the error:
atmel-sama5d2-isc 
f0008000.isc: failed to enable ispck: -13
atmel-sama5d2-isc: probe of 
f0008000.isc failed with error -13
This is because the enabling of the ispck is done too early in the probe,
and the PM runtime returns invalid request.
Thus, moved this clock enabling after pm_runtime_idle is called.
The ISPCK is required only for sama5d2 type of ISC.
Thus, add a bool inside the isc struct that is platform dependent.
For the sama7g5-isc, the enabling of the ISPCK is wrong and does not make
sense. Removed it from the sama7g5 probe. In sama7g5-isc, there is only
one clock, the MCK, which also clocks the internal pipeline of the ISC.
Adapted the clk_prepare and clk_unprepare to request the runtime PM
for both clocks (MCK and ISPCK) in case of sama5d2-isc, and the single
clock (MCK) in case of sama7g5-isc.
Fixes: dd97908ee350 ("media: atmel: properly get pm_runtime")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
        struct isc_clk *isc_clk = to_isc_clk(hw);
        int ret;
 
-       if (isc_clk->id == ISC_ISPCK) {
-               ret = pm_runtime_resume_and_get(isc_clk->dev);
-               if (ret < 0)
-                       return ret;
-       }
+       ret = pm_runtime_resume_and_get(isc_clk->dev);
+       if (ret < 0)
+               return ret;
 
        return isc_wait_clk_stable(hw);
 }
 
        isc_wait_clk_stable(hw);
 
-       if (isc_clk->id == ISC_ISPCK)
-               pm_runtime_put_sync(isc_clk->dev);
+       pm_runtime_put_sync(isc_clk->dev);
 }
 
 static int isc_clk_enable(struct clk_hw *hw)
        u32 status;
        int ret;
 
-       if (isc_clk->id == ISC_ISPCK) {
-               ret = pm_runtime_resume_and_get(isc_clk->dev);
-               if (ret < 0)
-                       return 0;
-       }
+       ret = pm_runtime_resume_and_get(isc_clk->dev);
+       if (ret < 0)
+               return 0;
 
        regmap_read(isc_clk->regmap, ISC_CLKSR, &status);
 
-       if (isc_clk->id == ISC_ISPCK)
-               pm_runtime_put_sync(isc_clk->dev);
+       pm_runtime_put_sync(isc_clk->dev);
 
        return status & ISC_CLK(isc_clk->id) ? 1 : 0;
 }
        const char *parent_names[3];
        int num_parents;
 
+       if (id == ISC_ISPCK && !isc->ispck_required)
+               return 0;
+
        num_parents = of_clk_get_parent_count(np);
        if (num_parents < 1 || num_parents > 3)
                return -EINVAL;
 
  * @hclock:            Hclock clock input (refer datasheet)
  * @ispck:             iscpck clock (refer datasheet)
  * @isc_clks:          ISC clocks
+ * @ispck_required:    ISC requires ISP Clock initialization
  * @dcfg:              DMA master configuration, architecture dependent
  *
  * @dev:               Registered device driver
        struct clk              *hclock;
        struct clk              *ispck;
        struct isc_clk          isc_clks[2];
+       bool                    ispck_required;
        u32                     dcfg;
 
        struct device           *dev;
 
        /* sama5d2-isc - 8 bits per beat */
        isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
 
+       /* sama5d2-isc : ISPCK is required and mandatory */
+       isc->ispck_required = true;
+
        ret = isc_pipeline_init(isc);
        if (ret)
                return ret;
                dev_err(dev, "failed to init isc clock: %d\n", ret);
                goto unprepare_hclk;
        }
-
-       isc->ispck = isc->isc_clks[ISC_ISPCK].clk;
-
-       ret = clk_prepare_enable(isc->ispck);
-       if (ret) {
-               dev_err(dev, "failed to enable ispck: %d\n", ret);
-               goto unprepare_hclk;
-       }
-
-       /* ispck should be greater or equal to hclock */
-       ret = clk_set_rate(isc->ispck, clk_get_rate(isc->hclock));
-       if (ret) {
-               dev_err(dev, "failed to set ispck rate: %d\n", ret);
-               goto unprepare_clk;
-       }
-
        ret = v4l2_device_register(dev, &isc->v4l2_dev);
        if (ret) {
                dev_err(dev, "unable to register v4l2 device.\n");
        pm_runtime_enable(dev);
        pm_request_idle(dev);
 
+       isc->ispck = isc->isc_clks[ISC_ISPCK].clk;
+
+       ret = clk_prepare_enable(isc->ispck);
+       if (ret) {
+               dev_err(dev, "failed to enable ispck: %d\n", ret);
+               goto cleanup_subdev;
+       }
+
+       /* ispck should be greater or equal to hclock */
+       ret = clk_set_rate(isc->ispck, clk_get_rate(isc->hclock));
+       if (ret) {
+               dev_err(dev, "failed to set ispck rate: %d\n", ret);
+               goto unprepare_clk;
+       }
+
        regmap_read(isc->regmap, ISC_VERSION + isc->offsets.version, &ver);
        dev_info(dev, "Microchip ISC version %x\n", ver);
 
        return 0;
 
+unprepare_clk:
+       clk_disable_unprepare(isc->ispck);
+
 cleanup_subdev:
        isc_subdev_cleanup(isc);
 
 unregister_v4l2_device:
        v4l2_device_unregister(&isc->v4l2_dev);
 
-unprepare_clk:
-       clk_disable_unprepare(isc->ispck);
 unprepare_hclk:
        clk_disable_unprepare(isc->hclock);
 
 
        /* sama7g5-isc RAM access port is full AXI4 - 32 bits per beat */
        isc->dcfg = ISC_DCFG_YMBSIZE_BEATS32 | ISC_DCFG_CMBSIZE_BEATS32;
 
+       /* sama7g5-isc : ISPCK does not exist, ISC is clocked by MCK */
+       isc->ispck_required = false;
+
        ret = isc_pipeline_init(isc);
        if (ret)
                return ret;
                goto unprepare_hclk;
        }
 
-       isc->ispck = isc->isc_clks[ISC_ISPCK].clk;
-
-       ret = clk_prepare_enable(isc->ispck);
-       if (ret) {
-               dev_err(dev, "failed to enable ispck: %d\n", ret);
-               goto unprepare_hclk;
-       }
-
-       /* ispck should be greater or equal to hclock */
-       ret = clk_set_rate(isc->ispck, clk_get_rate(isc->hclock));
-       if (ret) {
-               dev_err(dev, "failed to set ispck rate: %d\n", ret);
-               goto unprepare_clk;
-       }
-
        ret = v4l2_device_register(dev, &isc->v4l2_dev);
        if (ret) {
                dev_err(dev, "unable to register v4l2 device.\n");
-               goto unprepare_clk;
+               goto unprepare_hclk;
        }
 
        ret = xisc_parse_dt(dev, isc);
 unregister_v4l2_device:
        v4l2_device_unregister(&isc->v4l2_dev);
 
-unprepare_clk:
-       clk_disable_unprepare(isc->ispck);
 unprepare_hclk:
        clk_disable_unprepare(isc->hclock);