drm/i915: GPIO/GMBUS registers need an offset on VLV

GPIO/GMBUS registers must be offset on VLV, so simply
adjust gpio_mmio_base to include the correct offset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 7f0904170963598c565b008126dbb116a8dccea0..acf8aec9ada7162543954e4adf7c7b28d1bb4770 100644 (file)
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -515,6 +515,8 @@ int intel_setup_gmbus(struct drm_device *dev)
 
        if (HAS_PCH_SPLIT(dev))
                dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA;
+       else if (IS_VALLEYVIEW(dev))
+               dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE;
        else
                dev_priv->gpio_mmio_base = 0;