arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node

Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI
to avoid duplication in the devices DTs.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-1-6c43d293995f@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index ebcb481571c28267f0938b6b97394140fbf5a36f..c057e320c1d0a3332b6df925383362a806f7439e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2149,6 +2149,32 @@
                        #phy-cells = <1>;
 
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       usb_1_qmpphy_out: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       usb_1_qmpphy_usb_ss_in: endpoint {
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+
+                                       usb_1_qmpphy_dp_in: endpoint {
+                                       };
+                               };
+                       };
                };
 
                usb_2_qmpphy: phy-wrapper@88eb000 {