arm64: dts: mediatek: cherry: Enable the System Companion Processor

MT8195 features a SCP like some other older SoCs, and Cherry uses it
for various tasks. Add the required pin configuration and DMA pool
and enable the node.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220902081156.38526-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index fcc600674339a4b969885791d219bf531f34394b..e83d58d997570c3222969371559d4924370ecc14 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -104,6 +104,18 @@
                enable-active-high;
                regulator-always-on;
        };
+
+       reserved_memory: reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               scp_mem: memory@50000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x50000000 0 0x2900000>;
+                       no-map;
+               };
+       };
 };
 
 &i2c0 {
@@ -600,6 +612,14 @@
                };
        };
 
+       scp_pins: scp-default-pins {
+               pins-vreq {
+                       pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
+                       bias-disable;
+                       input-enable;
+               };
+       };
+
        spi0_pins: spi0-default-pins {
                pins-cs-mosi-clk {
                        pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
@@ -643,6 +663,15 @@
        interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
 };
 
+&scp {
+       status = "okay";
+
+       firmware-name = "mediatek/mt8195/scp.img";
+       memory-region = <&scp_mem>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&scp_pins>;
+};
+
 &spi0 {
        status = "okay";