clk: qcom: msm8916: fix mnd_width for codec_digcodec

This patch fixes missing mnd_width for codec_digital clk, this is now set to
8 inline with datasheet.

Fixes: 3966fab8b6ab ("clk: qcom: Add MSM8916 Global Clock Controller support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
index 506e0736bf92f11fbfab78d52858de1b7d16d450..d973aeaab943e773367efb5e42c633f43adf3c52 100644 (file)
--- a/drivers/clk/qcom/gcc-msm8916.c
+++ b/drivers/clk/qcom/gcc-msm8916.c
@@ -1443,6 +1443,7 @@ static const struct freq_tbl ftbl_codec_clk[] = {
 
 static struct clk_rcg2 codec_digcodec_clk_src = {
        .cmd_rcgr = 0x1c09c,
+       .mnd_width = 8,
        .hid_width = 5,
        .parent_map = gcc_xo_gpll1_emclk_sleep_map,
        .freq_tbl = ftbl_codec_clk,