}
 }
 
+static u8 ar9003_get_eepmisc(struct ath_hw *ah)
+{
+       return ah->eeprom.map4k.baseEepHeader.eepMisc;
+}
+
 const struct eeprom_ops eep_ar9300_ops = {
        .check_eeprom = ath9k_hw_ar9300_check_eeprom,
        .get_eeprom = ath9k_hw_ar9300_get_eeprom,
        .set_board_values = ath9k_hw_ar9300_set_board_values,
        .set_addac = ath9k_hw_ar9300_set_addac,
        .set_txpower = ath9k_hw_ar9300_set_txpower,
-       .get_spur_channel = ath9k_hw_ar9300_get_spur_channel
+       .get_spur_channel = ath9k_hw_ar9300_get_spur_channel,
+       .get_eepmisc = ar9003_get_eepmisc
 };
 
                           u16 cfgCtl, u8 twiceAntennaReduction,
                           u8 powerLimit, bool test);
        u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
+       u8 (*get_eepmisc)(struct ath_hw *ah);
 };
 
 void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val);
 
        return ah->eeprom.map4k.modalHeader.spurChans[i].spurChan;
 }
 
+static u8 ath9k_hw_4k_get_eepmisc(struct ath_hw *ah)
+{
+       return ah->eeprom.map4k.baseEepHeader.eepMisc;
+}
+
 const struct eeprom_ops eep_4k_ops = {
        .check_eeprom           = ath9k_hw_4k_check_eeprom,
        .get_eeprom             = ath9k_hw_4k_get_eeprom,
        .get_eeprom_rev         = ath9k_hw_4k_get_eeprom_rev,
        .set_board_values       = ath9k_hw_4k_set_board_values,
        .set_txpower            = ath9k_hw_4k_set_txpower,
-       .get_spur_channel       = ath9k_hw_4k_get_spur_channel
+       .get_spur_channel       = ath9k_hw_4k_get_spur_channel,
+       .get_eepmisc            = ath9k_hw_4k_get_eepmisc
 };
 
        return ah->eeprom.map9287.modalHeader.spurChans[i].spurChan;
 }
 
+static u8 ath9k_hw_ar9287_get_eepmisc(struct ath_hw *ah)
+{
+       return ah->eeprom.map9287.baseEepHeader.eepMisc;
+}
+
 const struct eeprom_ops eep_ar9287_ops = {
        .check_eeprom           = ath9k_hw_ar9287_check_eeprom,
        .get_eeprom             = ath9k_hw_ar9287_get_eeprom,
        .get_eeprom_rev         = ath9k_hw_ar9287_get_eeprom_rev,
        .set_board_values       = ath9k_hw_ar9287_set_board_values,
        .set_txpower            = ath9k_hw_ar9287_set_txpower,
-       .get_spur_channel       = ath9k_hw_ar9287_get_spur_channel
+       .get_spur_channel       = ath9k_hw_ar9287_get_spur_channel,
+       .get_eepmisc            = ath9k_hw_ar9287_get_eepmisc
 };
 
        return ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan;
 }
 
+static u8 ath9k_hw_def_get_eepmisc(struct ath_hw *ah)
+{
+       return ah->eeprom.def.baseEepHeader.eepMisc;
+}
+
 const struct eeprom_ops eep_def_ops = {
        .check_eeprom           = ath9k_hw_def_check_eeprom,
        .get_eeprom             = ath9k_hw_def_get_eeprom,
        .set_board_values       = ath9k_hw_def_set_board_values,
        .set_addac              = ath9k_hw_def_set_addac,
        .set_txpower            = ath9k_hw_def_set_txpower,
-       .get_spur_channel       = ath9k_hw_def_get_spur_channel
+       .get_spur_channel       = ath9k_hw_def_get_spur_channel,
+       .get_eepmisc            = ath9k_hw_def_get_eepmisc
 };