arm64: dts: ti: k3-j721e-mcu-wakeup: Add HyperBus node

J721E has a Flash SubSystem that has one OSPI and one HyperBus with
muxed datapath and another independent OSPI. Add DT nodes for HyperBus
controller and keep it disabled and model the data path selection mux as a
reg-mux.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513123313.11462-2-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 8d86f23b2123759e55f689e2db5d55780db906e1..bfe3907b4b55b54a012f80642090c008e96e4184 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -181,6 +181,27 @@
                #size-cells = <2>;
                ranges;
 
+               hbmc_mux: mux-controller@47000004 {
+                       compatible = "reg-mux";
+                       reg = <0x00 0x47000004 0x00 0x2>;
+                       #mux-control-cells = <1>;
+                       mux-reg-masks = <0x4 0x2>; /* HBMC select */
+               };
+
+               hbmc: hyperbus@47034000 {
+                       compatible = "ti,am654-hbmc";
+                       reg = <0x00 0x47034000 0x00 0x100>,
+                               <0x05 0x00000000 0x01 0x0000000>;
+                       power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
+                       clocks = <&k3_clks 102 0>;
+                       assigned-clocks = <&k3_clks 102 5>;
+                       assigned-clock-rates = <333333333>;
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+                       mux-controls = <&hbmc_mux 0>;
+                       status = "disabled";
+               };
+
                ospi0: spi@47040000 {
                        compatible = "ti,am654-ospi", "cdns,qspi-nor";
                        reg = <0x0 0x47040000 0x0 0x100>,