arm64: dts: qcom: ipq9574: rename al02-c7 dts to rdp433

Rename the dts after Reference Design Platform(RDP) to adopt
standard naming convention.

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230425084010.15581-7-quic_devipriy@quicinc.com

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index f8e8a4a416cbd5bd8b5f715e48f649083fd9573a..cddb90978cc1b068d0f406a08c7c81ecc03a037a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -10,7 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM)       += ipq6018-cp01-c1.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += ipq8074-hk01.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += ipq8074-hk10-c1.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += ipq8074-hk10-c2.dtb
-dtb-$(CONFIG_ARCH_QCOM)        += ipq9574-al02-c7.dtb
+dtb-$(CONFIG_ARCH_QCOM)        += ipq9574-rdp433.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += msm8916-acer-a1-724.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += msm8916-alcatel-idol347.dtb
 dtb-$(CONFIG_ARCH_QCOM)        += msm8916-asus-z00l.dtb

diff --git a/arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts b/arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts
deleted file mode 100644 (file)
index 2c84301..0000000
--- a/arch/arm64/boot/dts/qcom/ipq9574-al02-c7.dts
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/*
- * IPQ9574 AL02-C7 board device tree source
- *
- * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "ipq9574.dtsi"
-
-/ {
-       model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7";
-       compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";
-
-       aliases {
-               serial0 = &blsp1_uart2;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-};
-
-&blsp1_uart2 {
-       pinctrl-0 = <&uart2_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-};
-
-&sdhc_1 {
-       pinctrl-0 = <&sdc_default_state>;
-       pinctrl-names = "default";
-       mmc-ddr-1_8v;
-       mmc-hs200-1_8v;
-       mmc-hs400-1_8v;
-       mmc-hs400-enhanced-strobe;
-       max-frequency = <384000000>;
-       bus-width = <8>;
-       status = "okay";
-};
-
-&sleep_clk {
-       clock-frequency = <32000>;
-};
-
-&tlmm {
-       sdc_default_state: sdc-default-state {
-               clk-pins {
-                       pins = "gpio5";
-                       function = "sdc_clk";
-                       drive-strength = <8>;
-                       bias-disable;
-               };
-
-               cmd-pins {
-                       pins = "gpio4";
-                       function = "sdc_cmd";
-                       drive-strength = <8>;
-                       bias-pull-up;
-               };
-
-               data-pins {
-                       pins = "gpio0", "gpio1", "gpio2",
-                              "gpio3", "gpio6", "gpio7",
-                              "gpio8", "gpio9";
-                       function = "sdc_data";
-                       drive-strength = <8>;
-                       bias-pull-up;
-               };
-
-               rclk-pins {
-                       pins = "gpio10";
-                       function = "sdc_rclk";
-                       drive-strength = <8>;
-                       bias-pull-down;
-               };
-       };
-};
-
-&xo_board_clk {
-       clock-frequency = <24000000>;
-};

diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
new file mode 100644 (file)
index 0000000..2ce8e09
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * IPQ9574 RDP433 board device tree source
+ *
+ * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "ipq9574.dtsi"
+
+/ {
+       model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7";
+       compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";
+
+       aliases {
+               serial0 = &blsp1_uart2;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+};
+
+&blsp1_uart2 {
+       pinctrl-0 = <&uart2_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&sdhc_1 {
+       pinctrl-0 = <&sdc_default_state>;
+       pinctrl-names = "default";
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       mmc-hs400-enhanced-strobe;
+       max-frequency = <384000000>;
+       bus-width = <8>;
+       status = "okay";
+};
+
+&sleep_clk {
+       clock-frequency = <32000>;
+};
+
+&tlmm {
+       sdc_default_state: sdc-default-state {
+               clk-pins {
+                       pins = "gpio5";
+                       function = "sdc_clk";
+                       drive-strength = <8>;
+                       bias-disable;
+               };
+
+               cmd-pins {
+                       pins = "gpio4";
+                       function = "sdc_cmd";
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+
+               data-pins {
+                       pins = "gpio0", "gpio1", "gpio2",
+                              "gpio3", "gpio6", "gpio7",
+                              "gpio8", "gpio9";
+                       function = "sdc_data";
+                       drive-strength = <8>;
+                       bias-pull-up;
+               };
+
+               rclk-pins {
+                       pins = "gpio10";
+                       function = "sdc_rclk";
+                       drive-strength = <8>;
+                       bias-pull-down;
+               };
+       };
+};
+
+&xo_board_clk {
+       clock-frequency = <24000000>;
+};