/* Set mutex mod */
for (index = 0; index < num_comp; index++) {
s32 inner_id = MDP_COMP_NONE;
+ const u32 *mutex_idx;
+ const struct mdp_comp_blend *b;
if (CFG_CHECK(MT8183, p_id))
inner_id = CFG_GET(MT8183, path->config, components[index].type);
if (mdp_cfg_comp_is_dummy(path->mdp_dev, inner_id))
continue;
+
ctx = &path->comps[index];
if (is_output_disabled(p_id, ctx->param, count))
continue;
+
+ mutex_idx = data->mdp_mutex_table_idx;
id = ctx->comp->public_id;
- mtk_mutex_write_mod(mutex, data->mdp_mutex_table_idx[id], false);
+ mtk_mutex_write_mod(mutex, mutex_idx[id], false);
+ b = &data->comp_data[id].blend;
+ if (b && b->aid_mod)
+ mtk_mutex_write_mod(mutex, mutex_idx[b->b_id], false);
}
mtk_mutex_write_sof(mutex, MUTEX_SOF_IDX_SINGLE_MODE);
int i, ret;
for (i = 0; i < num; i++) {
+ struct mdp_dev *m = comps[i].mdp_dev;
+ enum mtk_mdp_comp_id id;
+ const struct mdp_comp_blend *b;
+
/* Bypass the dummy component*/
- if (!comps[i].mdp_dev)
+ if (!m)
continue;
+
ret = mdp_comp_clock_on(dev, &comps[i]);
if (ret)
return ret;
+
+ id = comps[i].public_id;
+ b = &m->mdp_data->comp_data[id].blend;
+
+ if (b && b->aid_clk) {
+ ret = mdp_comp_clock_on(dev, m->comp[b->b_id]);
+ if (ret)
+ return ret;
+ }
}
return 0;
int i;
for (i = 0; i < num; i++) {
+ struct mdp_dev *m = comps[i].mdp_dev;
+ enum mtk_mdp_comp_id id;
+ const struct mdp_comp_blend *b;
+
/* Bypass the dummy component*/
- if (!comps[i].mdp_dev)
+ if (!m)
continue;
+
mdp_comp_clock_off(dev, &comps[i]);
+
+ id = comps[i].public_id;
+ b = &m->mdp_data->comp_data[id].blend;
+
+ if (b && b->aid_clk)
+ mdp_comp_clock_off(dev, m->comp[b->b_id]);
}
}
u32 dts_reg_ofst;
};
+struct mdp_comp_blend {
+ enum mtk_mdp_comp_id b_id;
+ bool aid_mod;
+ bool aid_clk;
+};
+
struct mdp_comp_data {
struct mdp_comp_match match;
struct mdp_comp_info info;
+ struct mdp_comp_blend blend;
};
struct mdp_comp_ops;