drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp

In Bigjoiner check for DSC, bigjoiner interface bits for DP for
DISPLAY > 13 is 36 (Bspec: 49259).

v2: Corrected Display ver to 13.

v3: Follow convention for conditional statement. (Ville)

v4: Fix check for display ver. (Ville)

v5: Added note for 2 PPC. (Stan)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-6-ankit.k.nautiyal@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9775c1cbed2b85af1ec4bb58855ad035b1606149..a7c706a2327f4898eda1a8e1288cdbc041da9c60 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -802,8 +802,11 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
        bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
 
        if (bigjoiner) {
+               int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
+               /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */
+               int ppc = 2;
                u32 max_bpp_bigjoiner =
-                       i915->display.cdclk.max_cdclk_freq * 48 /
+                       i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits /
                        intel_dp_mode_to_fec_clock(mode_clock);
 
                bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);