arm64: zynqmp: Move clock node to zynqmp-clk-ccf.dtsi

Using clock firmware driver is not the only one option how to configure
clock. In past fixed clocks were also used and that configuration is still
valid that's why move clock firmware node to the same file where zynqmp_clk
references are used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/48bfd8cf0de4d10b9c4d745218595f28954f70d5.1623684253.git.michal.simek@xilinx.com

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index cf5295224750c76b14ccc5b6a0e1cd9b00302cc0..1e0b1bca7c94d242b17858ad2263b7d5b062eeaa 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -2,7 +2,7 @@
 /*
  * Clock specification for Xilinx ZynqMP
  *
- * (C) Copyright 2017 - 2019, Xilinx, Inc.
+ * (C) Copyright 2017 - 2021, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
  */
@@ -40,6 +40,17 @@
        };
 };
 
+&zynqmp_firmware {
+       zynqmp_clk: clock-controller {
+               #clock-cells = <1>;
+               compatible = "xlnx,zynqmp-clk";
+               clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>,
+                        <&aux_ref_clk>, <&gt_crx_ref_clk>;
+               clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk",
+                             "aux_ref_clk", "gt_crx_ref_clk";
+       };
+};
+
 &can0 {
        clocks = <&zynqmp_clk CAN0_REF>, <&zynqmp_clk LPD_LSBUS>;
 };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 3fa0517cfd9811863eaf1334e5e031e2354ec3a1..bd3f0d456ca438b6d50ead86e90fd68d0ec9be29 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -156,21 +156,6 @@
                                mbox-names = "tx", "rx";
                        };
 
-                       zynqmp_clk: clock-controller {
-                               #clock-cells = <1>;
-                               compatible = "xlnx,zynqmp-clk";
-                               clocks = <&pss_ref_clk>,
-                                        <&video_clk>,
-                                        <&pss_alt_ref_clk>,
-                                        <&aux_ref_clk>,
-                                        <&gt_crx_ref_clk>;
-                               clock-names = "pss_ref_clk",
-                                             "video_clk",
-                                             "pss_alt_ref_clk",
-                                             "aux_ref_clk",
-                                             "gt_crx_ref_clk";
-                       };
-
                        nvmem_firmware {
                                compatible = "xlnx,zynqmp-nvmem-fw";
                                #address-cells = <1>;