Larger physical address space for 32-bit MIPS.
authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 2 Dec 2007 07:14:17 +0000 (07:14 +0000)
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 2 Dec 2007 07:14:17 +0000 (07:14 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3765 c046a42c-6fe2-441c-8c8c-71466251a162

target-mips/mips-defs.h

index 251fa359dcb40bfdd5391f3e31fcd93a50913314..76ea8d019bee8863670ebe2e0acb89339df1fde2 100644 (file)
@@ -14,6 +14,9 @@
 #define TARGET_LONG_BITS 32
 #endif
 
+/* Even MIPS32 can have 36 bits physical address space. */
+#define TARGET_PHYS_ADDR_BITS 64
+
 /* Masks used to mark instructions to indicate which ISA level they
    were introduced in. */
 #define                ISA_MIPS1       0x00000001