drm/amdgpu: Move to common helper to query soc rev_id

Replace soc15, nv, soc21 get_rev_id callback with common
helper so we don't need to duplicate code when introduce
new asics.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 5ae400ae5fee34c1ee71134d97a72158fb6a52b4..c66706242254a4fa8a417e94d60b49e38be4d112 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1118,7 +1118,7 @@ void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
                                 u32 reg_addr, u32 reg_data);
 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
                                   u32 reg_addr, u64 reg_data);
-
+u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
 bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d35d50287a4413997bafe82d54466c37063062c9..6298e3c1de3913b13156c87334030c9ba1da6d64 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -807,6 +807,18 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
        spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
 }
 
+/**
+ * amdgpu_device_get_rev_id - query device rev_id
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Return device rev_id
+ */
+u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev)
+{
+       return adev->nbio.funcs->get_rev_id(adev);
+}
+
 /**
  * amdgpu_invalid_rreg - dummy reg read function
  *

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 1a441d302b349ef58f9d923f33b48c1143165cc5..f158e17b25266eb6b03d5fc100a94a130cafaf01 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -567,11 +567,6 @@ void nv_set_virt_ops(struct amdgpu_device *adev)
        adev->virt.ops = &xgpu_nv_virt_ops;
 }
 
-static uint32_t nv_get_rev_id(struct amdgpu_device *adev)
-{
-       return adev->nbio.funcs->get_rev_id(adev);
-}
-
 static bool nv_need_full_reset(struct amdgpu_device *adev)
 {
        return true;
@@ -713,7 +708,7 @@ static int nv_common_early_init(void *handle)
 
        adev->asic_funcs = &nv_asic_funcs;
 
-       adev->rev_id = nv_get_rev_id(adev);
+       adev->rev_id = amdgpu_device_get_rev_id(adev);
        adev->external_rev_id = 0xff;
        /* TODO: split the GC and PG flags based on the relevant IP version for which
         * they are relevant.

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 70343f9d25b983c504925b4a68e5d9ac20b75ef0..49541639b19858a03a47764bb59a8d8961060db9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -654,11 +654,6 @@ const struct amdgpu_ip_block_version vega10_common_ip_block =
        .funcs = &soc15_common_ip_funcs,
 };
 
-static uint32_t soc15_get_rev_id(struct amdgpu_device *adev)
-{
-       return adev->nbio.funcs->get_rev_id(adev);
-}
-
 static void soc15_reg_base_init(struct amdgpu_device *adev)
 {
        /* Set IP register base before any HW register access */
@@ -908,7 +903,7 @@ static int soc15_common_early_init(void *handle)
        adev->se_cac_rreg = &soc15_se_cac_rreg;
        adev->se_cac_wreg = &soc15_se_cac_wreg;
 
-       adev->rev_id = soc15_get_rev_id(adev);
+       adev->rev_id = amdgpu_device_get_rev_id(adev);
        adev->external_rev_id = 0xFF;
        /* TODO: split the GC and PG flags based on the relevant IP version for which
         * they are relevant.

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 5a5cc38fc0aed21c534dbd65bedcc355dbf66aa2..b3a33eab1fde2eec6c2cffda39b63c9b894cef03 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -481,11 +481,6 @@ const struct amdgpu_ip_block_version soc21_common_ip_block =
        .funcs = &soc21_common_ip_funcs,
 };
 
-static uint32_t soc21_get_rev_id(struct amdgpu_device *adev)
-{
-       return adev->nbio.funcs->get_rev_id(adev);
-}
-
 static bool soc21_need_full_reset(struct amdgpu_device *adev)
 {
        switch (adev->ip_versions[GC_HWIP][0]) {
@@ -626,7 +621,7 @@ static int soc21_common_early_init(void *handle)
 
        adev->asic_funcs = &soc21_asic_funcs;
 
-       adev->rev_id = soc21_get_rev_id(adev);
+       adev->rev_id = amdgpu_device_get_rev_id(adev);
        adev->external_rev_id = 0xff;
        switch (adev->ip_versions[GC_HWIP][0]) {
        case IP_VERSION(11, 0, 0):