drm/amd/display: replace FIXME with TODO

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
index 878bf4782ce611703e05eeb0ef1d1af300c2e39d..2c7455e22a65569884f8c86740f49c17e0293508 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
@@ -207,7 +207,7 @@ static void extract_rq_regs(struct display_mode_lib *mode_lib,
        rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height);
        rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
 
-       // FIXME: take the max between luma, chroma chunk size?
+       // TODO: take the max between luma, chroma chunk size?
        // okay for now, as we are setting chunk_bytes to 8kb anyways
        if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { //32kb
                rq_regs->drq_expansion_mode = 0;
@@ -677,7 +677,7 @@ static void get_surf_rq_param(struct display_mode_lib *mode_lib,
        unsigned int meta_pitch = 0;
        unsigned int ppe = mode_422 ? 2 : 1;
 
-       // FIXME check if ppe apply for both luma and chroma in 422 case
+       // TODO check if ppe apply for both luma and chroma in 422 case
        if (is_chroma) {
                vp_width = pipe_src_param.viewport_width_c / ppe;
                vp_height = pipe_src_param.viewport_height_c;
@@ -959,7 +959,7 @@ static void dml20_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        // Source
 //             dcc_en              = src.dcc;
        dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
-       mode_422 = 0; // FIXME
+       mode_422 = 0; // TODO
        access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
 //      bytes_per_element_l = get_bytes_per_element(source_format_class(src.source_format), 0);
 //      bytes_per_element_c = get_bytes_per_element(source_format_class(src.source_format), 1);
@@ -1655,7 +1655,7 @@ static void calculate_ttu_cursor(struct display_mode_lib *mode_lib,
                cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1)
                                * (double) cur_req_width;
                cur_req_per_width = cur_width_ub / (double) cur_req_width;
-               hactive_cur = (double) cur_src_width / hscl_ratio; // FIXME: oswin to think about what to do for cursor
+               hactive_cur = (double) cur_src_width / hscl_ratio; // TODO: oswin to think about what to do for cursor
 
                if (vratio_pre_l <= 1.0) {
                        *refcyc_per_req_delivery_pre_cur = hactive_cur * ref_freq_to_pix_freq

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
index ed8bf5f723c93b38621558ad5c1f27f4a8335087..1e6aeb1bd2bf6f0a910b3884aa538ac1714b8b09 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
@@ -207,7 +207,7 @@ static void extract_rq_regs(struct display_mode_lib *mode_lib,
        rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height);
        rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
 
-       // FIXME: take the max between luma, chroma chunk size?
+       // TODO: take the max between luma, chroma chunk size?
        // okay for now, as we are setting chunk_bytes to 8kb anyways
        if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { //32kb
                rq_regs->drq_expansion_mode = 0;
@@ -677,7 +677,7 @@ static void get_surf_rq_param(struct display_mode_lib *mode_lib,
        unsigned int meta_pitch = 0;
        unsigned int ppe = mode_422 ? 2 : 1;
 
-       // FIXME check if ppe apply for both luma and chroma in 422 case
+       // TODO check if ppe apply for both luma and chroma in 422 case
        if (is_chroma) {
                vp_width = pipe_src_param.viewport_width_c / ppe;
                vp_height = pipe_src_param.viewport_height_c;
@@ -959,7 +959,7 @@ static void dml20v2_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
        // Source
 //             dcc_en              = src.dcc;
        dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
-       mode_422 = 0; // FIXME
+       mode_422 = 0; // TODO
        access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
 //      bytes_per_element_l = get_bytes_per_element(source_format_class(src.source_format), 0);
 //      bytes_per_element_c = get_bytes_per_element(source_format_class(src.source_format), 1);
@@ -1655,7 +1655,7 @@ static void calculate_ttu_cursor(struct display_mode_lib *mode_lib,
                cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1)
                                * (double) cur_req_width;
                cur_req_per_width = cur_width_ub / (double) cur_req_width;
-               hactive_cur = (double) cur_src_width / hscl_ratio; // FIXME: oswin to think about what to do for cursor
+               hactive_cur = (double) cur_src_width / hscl_ratio; // TODO: oswin to think about what to do for cursor
 
                if (vratio_pre_l <= 1.0) {
                        *refcyc_per_req_delivery_pre_cur = hactive_cur * ref_freq_to_pix_freq

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
index ad8571f5a142fb3405d78dd165119f4a2a4a4d3e..4c3e9cc30167953a1b29f38d100589d4e65ef6ec 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
@@ -243,7 +243,7 @@ void dml1_extract_rq_regs(
        rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height);
        rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);
 
-       /* FIXME: take the max between luma, chroma chunk size?
+       /* TODO: take the max between luma, chroma chunk size?
         * okay for now, as we are setting chunk_bytes to 8kb anyways
         */
        if (rq_param.sizing.rq_l.chunk_bytes >= 32 * 1024) { /*32kb */
@@ -602,7 +602,7 @@ static void get_surf_rq_param(
        unsigned int log2_dpte_group_length;
        unsigned int func_meta_row_height, func_dpte_row_height;
 
-       /* FIXME check if ppe apply for both luma and chroma in 422 case */
+       /* TODO check if ppe apply for both luma and chroma in 422 case */
        if (is_chroma) {
                vp_width = pipe_src_param.viewport_width_c / ppe;
                vp_height = pipe_src_param.viewport_height_c;
@@ -1141,7 +1141,7 @@ void dml1_rq_dlg_get_dlg_params(
        ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int) dml_pow(2, 13));
        disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */
 
-       prefetch_xy_calc_in_dcfclk = 24.0; /* FIXME: ip_param */
+       prefetch_xy_calc_in_dcfclk = 24.0; /* TODO: ip_param */
        min_dcfclk_mhz = dlg_sys_param.deepsleep_dcfclk_mhz;
        t_calc_us = prefetch_xy_calc_in_dcfclk / min_dcfclk_mhz;
        min_ttu_vblank = dlg_sys_param.t_urg_wm_us;
@@ -1182,7 +1182,7 @@ void dml1_rq_dlg_get_dlg_params(
        dcc_en = e2e_pipe_param.pipe.src.dcc;
        dual_plane = is_dual_plane(
                        (enum source_format_class) e2e_pipe_param.pipe.src.source_format);
-       mode_422 = 0; /* FIXME */
+       mode_422 = 0; /* TODO */
        access_dir = (e2e_pipe_param.pipe.src.source_scan == dm_vert); /* vp access direction: horizontal or vertical accessed */
        bytes_per_element_l = get_bytes_per_element(
                        (enum source_format_class) e2e_pipe_param.pipe.src.source_format,
@@ -1837,7 +1837,7 @@ void dml1_rq_dlg_get_dlg_params(
                cur0_width_ub = dml_ceil((double) cur0_src_width / (double) cur0_req_width, 1)
                                * (double) cur0_req_width;
                cur0_req_per_width = cur0_width_ub / (double) cur0_req_width;
-               hactive_cur0 = (double) cur0_src_width / hratios_cur0; /* FIXME: oswin to think about what to do for cursor */
+               hactive_cur0 = (double) cur0_src_width / hratios_cur0; /* TODO: oswin to think about what to do for cursor */
 
                if (vratio_pre_l <= 1.0) {
                        refcyc_per_req_delivery_pre_cur0 = hactive_cur0 * ref_freq_to_pix_freq