RISC-V: Add defines for SBI debug console extension
authorAnup Patel <apatel@ventanamicro.com>
Fri, 22 Jul 2022 13:24:54 +0000 (18:54 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 20 Oct 2023 11:20:28 +0000 (16:50 +0530)
We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/sbi.h

index 5b4a1bf5f4395ca62c952c2b5502d7877459fca0..12dfda6bb9242f402c729e1c08184e04a2f96eec 100644 (file)
@@ -30,6 +30,7 @@ enum sbi_ext_id {
        SBI_EXT_HSM = 0x48534D,
        SBI_EXT_SRST = 0x53525354,
        SBI_EXT_PMU = 0x504D55,
+       SBI_EXT_DBCN = 0x4442434E,
 
        /* Experimentals extensions must lie within this range */
        SBI_EXT_EXPERIMENTAL_START = 0x08000000,
@@ -236,6 +237,12 @@ enum sbi_pmu_ctr_type {
 /* Flags defined for counter stop function */
 #define SBI_PMU_STOP_FLAG_RESET (1 << 0)
 
+enum sbi_ext_dbcn_fid {
+       SBI_EXT_DBCN_CONSOLE_WRITE = 0,
+       SBI_EXT_DBCN_CONSOLE_READ = 1,
+       SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2,
+};
+
 #define SBI_SPEC_VERSION_DEFAULT       0x1
 #define SBI_SPEC_VERSION_MAJOR_SHIFT   24
 #define SBI_SPEC_VERSION_MAJOR_MASK    0x7f