target/arm: Introduce store_cpu_field_constant() helper
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>
Fri, 29 Oct 2021 23:18:31 +0000 (01:18 +0200)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 2 Nov 2021 18:14:55 +0000 (14:14 -0400)
Similarly to the store_cpu_field() helper which takes a TCG
temporary, store its value to the CPUState, introduce the
store_cpu_field_constant() helper which store a constant to
CPUState (without using any TCG temporary).

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/translate-a32.h

index 88f15df60e84e196bccee362372a949187aba60c..17af8dc95a8762cb1d4709a85c121826969fd2cb 100644 (file)
@@ -70,6 +70,9 @@ static inline void store_cpu_offset(TCGv_i32 var, int offset)
 #define store_cpu_field(var, name) \
     store_cpu_offset(var, offsetof(CPUARMState, name))
 
+#define store_cpu_field_constant(val, name) \
+    tcg_gen_st_i32(tcg_constant_i32(val), cpu_env, offsetof(CPUARMState, name))
+
 /* Create a new temporary and set it to the value of a CPU register.  */
 static inline TCGv_i32 load_reg(DisasContext *s, int reg)
 {