RISCV: KVM: Add senvcfg context save/restore
authorMayuresh Chitale <mchitale@ventanamicro.com>
Wed, 13 Sep 2023 16:39:03 +0000 (22:09 +0530)
committerAnup Patel <anup@brainfault.org>
Thu, 12 Oct 2023 13:14:09 +0000 (18:44 +0530)
Add senvcfg context save/restore for guest VCPUs and also add it to the
ONE_REG interface to allow its access from user space.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/csr.h
arch/riscv/include/asm/kvm_host.h
arch/riscv/include/uapi/asm/kvm.h
arch/riscv/kvm/vcpu.c

index 5717004d80fb32e3eea91cef327ba4f40a4e1b31..65b871dbf7e864f2dec67b077192c3a17f53c524 100644 (file)
 #define CSR_SIE                        0x104
 #define CSR_STVEC              0x105
 #define CSR_SCOUNTEREN         0x106
+#define CSR_SENVCFG            0x10a
 #define CSR_SSCRATCH           0x140
 #define CSR_SEPC               0x141
 #define CSR_SCAUSE             0x142
index 50f3d6393d501b22689903a77a537c635cfd46d6..1980be6a3e797d00e11cab26b0fd6b7277066845 100644 (file)
@@ -162,6 +162,7 @@ struct kvm_vcpu_csr {
        unsigned long hvip;
        unsigned long vsatp;
        unsigned long scounteren;
+       unsigned long senvcfg;
 };
 
 struct kvm_vcpu_config {
@@ -188,6 +189,7 @@ struct kvm_vcpu_arch {
        unsigned long host_sscratch;
        unsigned long host_stvec;
        unsigned long host_scounteren;
+       unsigned long host_senvcfg;
 
        /* CPU context of Host */
        struct kvm_cpu_context host_context;
index 12c17656c156d9dbfeefb25b179d8790d07d4315..c161791f55cb4af7c8620dd9b90c9f61f4255e97 100644 (file)
@@ -80,6 +80,7 @@ struct kvm_riscv_csr {
        unsigned long sip;
        unsigned long satp;
        unsigned long scounteren;
+       unsigned long senvcfg;
 };
 
 /* AIA CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
index 417e257e05e1b57df4dde58fa815126920f20a56..3013ae30c3af219d25210d15f1ce4a94565164cd 100644 (file)
@@ -619,6 +619,20 @@ static void kvm_riscv_update_hvip(struct kvm_vcpu *vcpu)
        kvm_riscv_vcpu_aia_update_hvip(vcpu);
 }
 
+static __always_inline void kvm_riscv_vcpu_swap_in_guest_state(struct kvm_vcpu *vcpu)
+{
+       struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
+
+       vcpu->arch.host_senvcfg = csr_swap(CSR_SENVCFG, csr->senvcfg);
+}
+
+static __always_inline void kvm_riscv_vcpu_swap_in_host_state(struct kvm_vcpu *vcpu)
+{
+       struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
+
+       csr->senvcfg = csr_swap(CSR_SENVCFG, vcpu->arch.host_senvcfg);
+}
+
 /*
  * Actually run the vCPU, entering an RCU extended quiescent state (EQS) while
  * the vCPU is running.
@@ -628,10 +642,12 @@ static void kvm_riscv_update_hvip(struct kvm_vcpu *vcpu)
  */
 static void noinstr kvm_riscv_vcpu_enter_exit(struct kvm_vcpu *vcpu)
 {
+       kvm_riscv_vcpu_swap_in_guest_state(vcpu);
        guest_state_enter_irqoff();
        __kvm_riscv_switch_to(&vcpu->arch);
        vcpu->arch.last_exit_cpu = vcpu->cpu;
        guest_state_exit_irqoff();
+       kvm_riscv_vcpu_swap_in_host_state(vcpu);
 }
 
 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)