arm64/sysreg: Fix a few missed conversions
authorNathan Chancellor <nathan@kernel.org>
Mon, 19 Sep 2022 16:09:28 +0000 (09:09 -0700)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 21 Sep 2022 08:24:29 +0000 (09:24 +0100)
After the conversion to automatically generating the ID_AA64DFR0_EL1
definition names, the build fails in a few different places because some
of the definitions were not changed to their new names along the way.
Update the names to resolve the build errors.

Fixes: c0357a73fa4a ("arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220919160928.3905780-1-nathan@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
drivers/hwtracing/coresight/coresight-etm4x-core.c
drivers/hwtracing/coresight/coresight-trbe.h
drivers/perf/arm_spe_pmu.c

index d39660a3e50c5634df15c68d7a50c8304f483368..80fefaba58eebea9f8252d1884ecee5a84e25798 100644 (file)
@@ -966,7 +966,7 @@ static inline bool cpu_supports_sysreg_trace(void)
 {
        u64 dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
 
-       return ((dfr0 >> ID_AA64DFR0_TRACEVER_SHIFT) & 0xfUL) > 0;
+       return ((dfr0 >> ID_AA64DFR0_EL1_TraceVer_SHIFT) & 0xfUL) > 0;
 }
 
 static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata,
@@ -1054,7 +1054,7 @@ static void cpu_detect_trace_filtering(struct etmv4_drvdata *drvdata)
        u64 trfcr;
 
        drvdata->trfcr = 0;
-       if (!cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_TRACE_FILT_SHIFT))
+       if (!cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT))
                return;
 
        /*
index 30e4d7db4f8e12e2142852efa9d1a3c5978adc9c..98ff1b17ad079d333f5285d21074fbef1a683941 100644 (file)
@@ -20,7 +20,8 @@
 static inline bool is_trbe_available(void)
 {
        u64 aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
-       unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, ID_AA64DFR0_TRBE_SHIFT);
+       unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0,
+                                                                ID_AA64DFR0_EL1_TraceBuffer_SHIFT);
 
        return trbe >= 0b0001;
 }
index b65a7d9640e1549ea476418a52f0884748ea2550..6ce05ef4844da1e735d97566cd174c8f99224372 100644 (file)
@@ -674,9 +674,9 @@ static irqreturn_t arm_spe_pmu_irq_handler(int irq, void *dev)
 static u64 arm_spe_pmsevfr_res0(u16 pmsver)
 {
        switch (pmsver) {
-       case ID_AA64DFR0_PMSVER_8_2:
+       case ID_AA64DFR0_EL1_PMSVer_IMP:
                return SYS_PMSEVFR_EL1_RES0_8_2;
-       case ID_AA64DFR0_PMSVER_8_3:
+       case ID_AA64DFR0_EL1_PMSVer_V1P1:
        /* Return the highest version we support in default */
        default:
                return SYS_PMSEVFR_EL1_RES0_8_3;
@@ -958,7 +958,7 @@ static void __arm_spe_pmu_dev_probe(void *info)
        struct device *dev = &spe_pmu->pdev->dev;
 
        fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64DFR0_EL1),
-                                                  ID_AA64DFR0_PMSVER_SHIFT);
+                                                  ID_AA64DFR0_EL1_PMSVer_SHIFT);
        if (!fld) {
                dev_err(dev,
                        "unsupported ID_AA64DFR0_EL1.PMSVer [%d] on CPU %d\n",