clocksource/drivers/timer-npcm7xx: Enable timer 1 clock before use
authorJonathan Neuschäfer <j.neuschaefer@gmx.net>
Fri, 4 Nov 2022 16:18:46 +0000 (17:18 +0100)
committerDaniel Lezcano <daniel.lezcano@kernel.org>
Fri, 2 Dec 2022 11:48:28 +0000 (12:48 +0100)
In the WPCM450 SoC, the clocks for each timer can be gated individually.
To prevent the timer 1 clock from being gated, enable it explicitly.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20221104161850.2889894-3-j.neuschaefer@gmx.net
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
drivers/clocksource/timer-npcm7xx.c

index a00520cbb660a1c8ee2e14e3cee30043390356f4..9af30af5f989af0293d32270a073424262c77079 100644 (file)
@@ -188,6 +188,7 @@ static void __init npcm7xx_clocksource_init(void)
 
 static int __init npcm7xx_timer_init(struct device_node *np)
 {
+       struct clk *clk;
        int ret;
 
        ret = timer_of_init(np, &npcm7xx_to);
@@ -199,6 +200,15 @@ static int __init npcm7xx_timer_init(struct device_node *np)
        npcm7xx_to.of_clk.rate = npcm7xx_to.of_clk.rate /
                (NPCM7XX_Tx_MIN_PRESCALE + 1);
 
+       /* Enable the clock for timer1, if it exists */
+       clk = of_clk_get(np, 1);
+       if (clk) {
+               if (!IS_ERR(clk))
+                       clk_prepare_enable(clk);
+               else
+                       pr_warn("%pOF: Failed to get clock for timer1: %pe", np, clk);
+       }
+
        npcm7xx_clocksource_init();
        npcm7xx_clockevents_init();