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perf/x86/intel: Add Jasper Lake support
author
Kan Liang
<kan.liang@linux.intel.com>
Mon, 28 Sep 2020 12:30:41 +0000
(
05:30
-0700)
committer
Peter Zijlstra
<peterz@infradead.org>
Tue, 29 Sep 2020 07:57:01 +0000
(09:57 +0200)
The Jasper Lake processor is also a Tremont microarchitecture. From the
perspective of Intel PMU, there is nothing changed compared with
Elkhart Lake.
Share the perf code with Elkhart Lake.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link:
https://lkml.kernel.org/r/1601296242-32763-1-git-send-email-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
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diff --git
a/arch/x86/events/intel/core.c
b/arch/x86/events/intel/core.c
index c72e4904e0567fde5770a3a5f614c089649c2c8d..75dea6746d2df1b73fdb36ff969d0b11a0b3908d 100644
(file)
--- a/
arch/x86/events/intel/core.c
+++ b/
arch/x86/events/intel/core.c
@@
-5135,6
+5135,7
@@
__init int intel_pmu_init(void)
case INTEL_FAM6_ATOM_TREMONT_D:
case INTEL_FAM6_ATOM_TREMONT:
+ case INTEL_FAM6_ATOM_TREMONT_L:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
sizeof(hw_cache_event_ids));