phy: qcom-qmp: move PCS MISC V4 registers to separate header
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 24 Aug 2023 21:19:41 +0000 (00:19 +0300)
committerVinod Koul <vkoul@kernel.org>
Thu, 21 Sep 2023 13:53:58 +0000 (15:53 +0200)
Move PCS MISC V4 registers to the separate header.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h [new file with mode: 0644]
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
drivers/phy/qualcomm/phy-qcom-qmp.h

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v4.h
new file mode 100644 (file)
index 0000000..e256a08
--- /dev/null
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef QCOM_PHY_QMP_PCS_MISC_V4_H_
+#define QCOM_PHY_QMP_PCS_MISC_V4_H_
+
+/* Only for QMP V4 PHY - PCS_MISC registers */
+#define QPHY_V4_PCS_MISC_TYPEC_CTRL                    0x00
+#define QPHY_V4_PCS_MISC_TYPEC_PWRDN_CTRL              0x04
+#define QPHY_V4_PCS_MISC_PCS_MISC_CONFIG1              0x08
+#define QPHY_V4_PCS_MISC_CLAMP_ENABLE                  0x0c
+#define QPHY_V4_PCS_MISC_TYPEC_STATUS                  0x10
+#define QPHY_V4_PCS_MISC_PLACEHOLDER_STATUS            0x14
+
+#endif
index 411cf0ae148d605868ecc752d27f375b3606a622..42a1a3f007596066e1550d8a76931306e50dfa57 100644 (file)
@@ -21,6 +21,7 @@
 
 #include "phy-qcom-qmp.h"
 #include "phy-qcom-qmp-pcs-misc-v3.h"
+#include "phy-qcom-qmp-pcs-misc-v4.h"
 #include "phy-qcom-qmp-pcs-usb-v4.h"
 #include "phy-qcom-qmp-pcs-usb-v5.h"
 
index 32d8976847557a5878a227eefb95044205bf515c..71f063f4a56e3d6234792af5332fd4104a6e9e25 100644 (file)
 #define QSERDES_V4_DP_PHY_AUX_INTERRUPT_STATUS         0x0d8
 #define QSERDES_V4_DP_PHY_STATUS                       0x0dc
 
-/* Only for QMP V4 PHY - PCS_MISC registers */
-#define QPHY_V4_PCS_MISC_TYPEC_CTRL                    0x00
-#define QPHY_V4_PCS_MISC_TYPEC_PWRDN_CTRL              0x04
-#define QPHY_V4_PCS_MISC_PCS_MISC_CONFIG1              0x08
-#define QPHY_V4_PCS_MISC_CLAMP_ENABLE                  0x0c
-#define QPHY_V4_PCS_MISC_TYPEC_STATUS                  0x10
-#define QPHY_V4_PCS_MISC_PLACEHOLDER_STATUS            0x14
-
 #define QSERDES_V5_DP_PHY_STATUS                       0x0dc
 
 /* Only for QMP V6 PHY - DP PHY registers */