mt76: mt7921: enable sw interrupts

Enable sw interrupts in order to wake the device from deep sleep
receiving packets

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>

diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c
index c2697961411392fcf85ea097c83ba721840cdd93..7ada8339b74f1877d54be6c5dc3ca0daec53245f 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c
@@ -351,6 +351,7 @@ int mt7921_dma_init(struct mt7921_dev *dev)
        /* enable interrupts for TX/RX rings */
        mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
                          MT_INT_MCU_CMD);
+       mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
 
        return 0;
 }

diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c
index 7b5323181fac9c4b8e1a9d72159e7ca477e68bc1..8770e0d93f45be89da685f90bc3182b4a5f5505b 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c
@@ -1276,6 +1276,7 @@ mt7921_dma_reset(struct mt7921_dev *dev)
        mt7921_irq_enable(dev,
                          MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
                          MT_INT_MCU_CMD);
+       mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
 }
 
 void mt7921_tx_token_put(struct mt7921_dev *dev)

diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c
index 40e2086d075c72aab7195c250f9119ed8c6e7631..d5da98d36f63606ae4f396fe504030122221b8ce 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c
@@ -61,6 +61,18 @@ static void mt7921_irq_tasklet(unsigned long data)
        if (intr & MT_INT_TX_DONE_MCU)
                mask |= MT_INT_TX_DONE_MCU;
 
+       if (intr & MT_INT_MCU_CMD) {
+               u32 intr_sw;
+
+               intr_sw = mt76_rr(dev, MT_MCU_CMD);
+               /* ack MCU2HOST_SW_INT_STA */
+               mt76_wr(dev, MT_MCU_CMD, intr_sw);
+               if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) {
+                       mask |= MT_INT_RX_DONE_DATA;
+                       intr |= MT_INT_RX_DONE_DATA;
+               }
+       }
+
        mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0);
 
        if (intr & MT_INT_TX_DONE_ALL)
@@ -253,6 +265,7 @@ static int mt7921_pci_resume(struct pci_dev *pdev)
        mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
        mt7921_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
                          MT_INT_MCU_CMD);
+       mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
 
        /* put dma enabled */
        mt76_set(dev, MT_WFDMA0_GLO_CFG,

diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/regs.h b/drivers/net/wireless/mediatek/mt76/mt7921/regs.h
index 76ecfea21dce684d73464c1c635facb8a25750b6..b6944c867a57343842af81caa3ca46b2d020bd18 100644 (file)
--- a/drivers/net/wireless/mediatek/mt76/mt7921/regs.h
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/regs.h
@@ -251,13 +251,16 @@
 #define MT_WFDMA0_BUSY_ENA_TX_FIFO1    BIT(1)
 #define MT_WFDMA0_BUSY_ENA_RX_FIFO     BIT(2)
 
-#define MT_MCU_CMD                     MT_WFDMA0(0x1f0)
-#define MT_MCU_CMD_STOP_DMA_FW_RELOAD  BIT(1)
-#define MT_MCU_CMD_STOP_DMA            BIT(2)
-#define MT_MCU_CMD_RESET_DONE          BIT(3)
-#define MT_MCU_CMD_RECOVERY_DONE       BIT(4)
-#define MT_MCU_CMD_NORMAL_STATE               BIT(5)
-#define MT_MCU_CMD_ERROR_MASK          GENMASK(5, 1)
+#define MT_MCU_CMD                     MT_WFDMA0(0x1f0)
+#define MT_MCU_CMD_WAKE_RX_PCIE                BIT(0)
+#define MT_MCU_CMD_STOP_DMA_FW_RELOAD  BIT(1)
+#define MT_MCU_CMD_STOP_DMA            BIT(2)
+#define MT_MCU_CMD_RESET_DONE          BIT(3)
+#define MT_MCU_CMD_RECOVERY_DONE       BIT(4)
+#define MT_MCU_CMD_NORMAL_STATE                BIT(5)
+#define MT_MCU_CMD_ERROR_MASK          GENMASK(5, 1)
+
+#define MT_MCU2HOST_SW_INT_ENA         MT_WFDMA0(0x1f4)
 
 #define MT_WFDMA0_HOST_INT_STA         MT_WFDMA0(0x200)
 #define HOST_RX_DONE_INT_STS0          BIT(0)  /* Rx mcu */