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arm64: dts: qcom: sc8280xp: Add QFPROM node
author
Konrad Dybcio
<konrad.dybcio@linaro.org>
Thu, 7 Mar 2024 20:25:55 +0000
(21:25 +0100)
committer
Bjorn Andersson
<andersson@kernel.org>
Mon, 18 Mar 2024 01:27:06 +0000
(20:27 -0500)
Describe the QFPROM NVMEM block. Also, add a subnode to represent the
GPU speed bin region within it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link:
https://lore.kernel.org/r/20240307-topic-8280_nodes-v1-2-4eba20e08902@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
patch
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diff --git
a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index f3eb39f22702aeb6bdd7ce1843a89a01cfc33cf4..eb19ae4e486f3efc0ff398855d29ff97e182f00d 100644
(file)
--- a/
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@
-862,6
+862,18
@@
#mbox-cells = <2>;
};
+ qfprom: efuse@784000 {
+ compatible = "qcom,sc8280xp-qfprom", "qcom,qfprom";
+ reg = <0 0x00784000 0 0x3000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gpu_speed_bin: gpu-speed-bin@18b {
+ reg = <0x18b 0x1>;
+ bits = <5 3>;
+ };
+ };
+
qup2: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x008c0000 0 0x2000>;