drm/amdgpu: enable gfx clock gatings for navi12

enables following gfx clock gating features:

- medium grained clock gating
- medium grained light sleep
- coarse grained clock gating
- cp memory light sleep
- rlc memory light sleep

CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 3e67536f0dc9c0b532b56bf3ea04a121b1e95fa1..c5c71b3b628f8d1b7f798cefe07162ef7a9d09b0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -641,7 +641,11 @@ static int nv_common_early_init(void *handle)
                adev->external_rev_id = adev->rev_id + 20;
                break;
        case CHIP_NAVI12:
-               adev->cg_flags = 0;
+               adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
+                       AMD_CG_SUPPORT_GFX_MGLS |
+                       AMD_CG_SUPPORT_GFX_CGCG |
+                       AMD_CG_SUPPORT_GFX_CP_LS |
+                       AMD_CG_SUPPORT_GFX_RLC_LS;
                adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG;
                adev->external_rev_id = adev->rev_id + 0xa;
                break;