firmware: qcom_scm: Introduce SCM calls to access LMh

Introduce SCM calls to access/configure limits management hardware(LMH).

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210809191605.3742979-2-thara.gopinath@linaro.org

diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index 47ea2bd42b1004534ab311badda9b46d21b6012c..8a503753fe2af5ddf834e4e01080dec4b916b2dd 100644 (file)
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -1147,6 +1147,64 @@ int qcom_scm_qsmmu500_wait_safe_toggle(bool en)
 }
 EXPORT_SYMBOL(qcom_scm_qsmmu500_wait_safe_toggle);
 
+bool qcom_scm_lmh_dcvsh_available(void)
+{
+       return __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_LMH, QCOM_SCM_LMH_LIMIT_DCVSH);
+}
+EXPORT_SYMBOL(qcom_scm_lmh_dcvsh_available);
+
+int qcom_scm_lmh_profile_change(u32 profile_id)
+{
+       struct qcom_scm_desc desc = {
+               .svc = QCOM_SCM_SVC_LMH,
+               .cmd = QCOM_SCM_LMH_LIMIT_PROFILE_CHANGE,
+               .arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL),
+               .args[0] = profile_id,
+               .owner = ARM_SMCCC_OWNER_SIP,
+       };
+
+       return qcom_scm_call(__scm->dev, &desc, NULL);
+}
+EXPORT_SYMBOL(qcom_scm_lmh_profile_change);
+
+int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
+                      u64 limit_node, u32 node_id, u64 version)
+{
+       dma_addr_t payload_phys;
+       u32 *payload_buf;
+       int ret, payload_size = 5 * sizeof(u32);
+
+       struct qcom_scm_desc desc = {
+               .svc = QCOM_SCM_SVC_LMH,
+               .cmd = QCOM_SCM_LMH_LIMIT_DCVSH,
+               .arginfo = QCOM_SCM_ARGS(5, QCOM_SCM_RO, QCOM_SCM_VAL, QCOM_SCM_VAL,
+                                       QCOM_SCM_VAL, QCOM_SCM_VAL),
+               .args[1] = payload_size,
+               .args[2] = limit_node,
+               .args[3] = node_id,
+               .args[4] = version,
+               .owner = ARM_SMCCC_OWNER_SIP,
+       };
+
+       payload_buf = dma_alloc_coherent(__scm->dev, payload_size, &payload_phys, GFP_KERNEL);
+       if (!payload_buf)
+               return -ENOMEM;
+
+       payload_buf[0] = payload_fn;
+       payload_buf[1] = 0;
+       payload_buf[2] = payload_reg;
+       payload_buf[3] = 1;
+       payload_buf[4] = payload_val;
+
+       desc.args[0] = payload_phys;
+
+       ret = qcom_scm_call(__scm->dev, &desc, NULL);
+
+       dma_free_coherent(__scm->dev, payload_size, payload_buf, payload_phys);
+       return ret;
+}
+EXPORT_SYMBOL(qcom_scm_lmh_dcvsh);
+
 static int qcom_scm_find_dload_address(struct device *dev, u64 *addr)
 {
        struct device_node *tcsr;

diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 632fe31424621a79f4793e8d0ee99c53320ae2ff..d92156ceb3ac57283c1d20f3c7a5934cca74b064 100644 (file)
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -114,6 +114,10 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
 #define QCOM_SCM_SVC_HDCP              0x11
 #define QCOM_SCM_HDCP_INVOKE           0x01
 
+#define QCOM_SCM_SVC_LMH                       0x13
+#define QCOM_SCM_LMH_LIMIT_PROFILE_CHANGE      0x01
+#define QCOM_SCM_LMH_LIMIT_DCVSH               0x10
+
 #define QCOM_SCM_SVC_SMMU_PROGRAM              0x15
 #define QCOM_SCM_SMMU_CONFIG_ERRATA1           0x03
 #define QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL        0x02

diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 0165824c5128bb53d59d56ac10e6b77f350b9b75..c0475d1c98850b1058c83a728bc14c3ff504c5c6 100644 (file)
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -109,6 +109,12 @@ extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
                             u32 *resp);
 
 extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
+
+extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
+                             u64 limit_node, u32 node_id, u64 version);
+extern int qcom_scm_lmh_profile_change(u32 profile_id);
+extern bool qcom_scm_lmh_dcvsh_available(void);
+
 #else
 
 #include <linux/errno.h>
@@ -170,5 +176,13 @@ static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
 
 static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en)
                { return -ENODEV; }
+
+static inline int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
+                                    u64 limit_node, u32 node_id, u64 version)
+               { return -ENODEV; }
+
+static inline int qcom_scm_lmh_profile_change(u32 profile_id) { return -ENODEV; }
+
+static inline bool qcom_scm_lmh_dcvsh_available(void) { return -ENODEV; }
 #endif
 #endif