IB/mlx5: Set right RoCE l3 type and roce version while deleting GID
authorParav Pandit <parav@nvidia.com>
Sun, 18 Apr 2021 13:49:39 +0000 (16:49 +0300)
committerJason Gunthorpe <jgg@nvidia.com>
Tue, 20 Apr 2021 12:41:10 +0000 (09:41 -0300)
Currently when GID is deleted, it zero out all the fields of the RoCE
address in the SET_ROCE_ADDRESS command for a specified index.

roce_version = 0 means RoCEv1 in the SET_ROCE_ADDRESS command.

This assumes that device has RoCEv1 always enabled which is not always
correct. For example Subfunction does not support RoCEv1.

Due to this assumption a previously added RoCEv2 GID is always deleted as
RoCEv1 GID. This results in a below syndrome:

   mlx5_core.sf mlx5_core.sf.4: mlx5_cmd_check:777:(pid 4256): SET_ROCE_ADDRESS(0x761) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x12822d)

Hence set the right RoCE version during GID deletion provided by the core.

Link: https://lore.kernel.org/r/d3f54129c90ca329caf438dbe31875d8ad08d91a.1618753425.git.leonro@nvidia.com
Signed-off-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/mlx5/main.c
drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c

index 7ea6137f8d12f42e385a1d0efb03f9cc89cbf565..6d1dd09a4388177be9a0fedae2c89d026ace1be4 100644 (file)
@@ -555,15 +555,15 @@ static int set_roce_addr(struct mlx5_ib_dev *dev, u32 port_num,
                         unsigned int index, const union ib_gid *gid,
                         const struct ib_gid_attr *attr)
 {
-       enum ib_gid_type gid_type = IB_GID_TYPE_ROCE;
+       enum ib_gid_type gid_type;
        u16 vlan_id = 0xffff;
        u8 roce_version = 0;
        u8 roce_l3_type = 0;
        u8 mac[ETH_ALEN];
        int ret;
 
+       gid_type = attr->gid_type;
        if (gid) {
-               gid_type = attr->gid_type;
                ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]);
                if (ret)
                        return ret;
@@ -575,7 +575,7 @@ static int set_roce_addr(struct mlx5_ib_dev *dev, u32 port_num,
                break;
        case IB_GID_TYPE_ROCE_UDP_ENCAP:
                roce_version = MLX5_ROCE_VERSION_2;
-               if (ipv6_addr_v4mapped((void *)gid))
+               if (gid && ipv6_addr_v4mapped((void *)gid))
                        roce_l3_type = MLX5_ROCE_L3_TYPE_IPV4;
                else
                        roce_l3_type = MLX5_ROCE_L3_TYPE_IPV6;
@@ -602,7 +602,7 @@ static int mlx5_ib_del_gid(const struct ib_gid_attr *attr,
                           __always_unused void **context)
 {
        return set_roce_addr(to_mdev(attr->device), attr->port_num,
-                            attr->index, NULL, NULL);
+                            attr->index, NULL, attr);
 }
 
 __be16 mlx5_get_roce_udp_sport_min(const struct mlx5_ib_dev *dev,
index a68738c8f4bcdb4e32a29e4fd0d699a879e636ea..215fa8bdce4825901f929145042caaee87d5f7f5 100644 (file)
@@ -142,10 +142,10 @@ int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
                }
 
                ether_addr_copy(addr_mac, mac);
-               MLX5_SET_RA(in_addr, roce_version, roce_version);
-               MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type);
                memcpy(addr_l3_addr, gid, gidsz);
        }
+       MLX5_SET_RA(in_addr, roce_version, roce_version);
+       MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type);
 
        if (MLX5_CAP_GEN(dev, num_vhca_ports) > 0)
                MLX5_SET(set_roce_address_in, in, vhca_port_num, port_num);