dt-bindings: gpio: gpio-mvebu: document offset and marvell,pwm-offset

The offset and marvell,pwm-offset properties weren't in the old binding.
Add them based on the existing usage in the driver and board DTS when
the marvell,armada-8k-gpio compatible is used.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>

diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
index 459ec35864fe89e81f6e5548f0523571099f2f1e..f1bd1e6b2e1f8d66cb26724a2e33cc207133cf83 100644 (file)
--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
@@ -45,6 +45,10 @@ properties:
       - const: pwm
     minItems: 1
 
+  offset:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Offset in the register map for the gpio registers (in bytes)
+
   interrupts:
     description: |
       The list of interrupts that are used for all the pins managed by this
@@ -68,6 +72,10 @@ properties:
   "#gpio-cells":
     const: 2
 
+  marvell,pwm-offset:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Offset in the register map for the pwm registers (in bytes)
+
   "#pwm-cells":
     description:
       The first cell is the GPIO line number. The second cell is the period