GPIO registers include Bit 27 for WakeCntrlZ used to enable wake in
Z state. Hence add Z-state wake control bits to debugfs output to
debug and analyze Z-states problems.
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Suggested-by: Mario Limonciello <mario.limonciello@amd.com>
Tested-by: Guruvendra Punugupati <Guruvendra.Punugupati@amd.com>
Link: https://lore.kernel.org/r/20221208093704.1151928-1-Basavaraj.Natikar@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
char *orientation;
char debounce_value[40];
char *debounce_enable;
+ char *wake_cntrlz;
for (bank = 0; bank < gpio_dev->hwbank_num; bank++) {
unsigned int time = 0;
wake_cntrl2 = " ∅";
seq_printf(s, "S4/S5 %s| ", wake_cntrl2);
+ if (pin_reg & BIT(WAKECNTRL_Z_OFF))
+ wake_cntrlz = "⏰";
+ else
+ wake_cntrlz = " ∅";
+ seq_printf(s, "Z %s| ", wake_cntrlz);
+
if (pin_reg & BIT(PULL_UP_ENABLE_OFF)) {
pull_up_enable = "+";
if (pin_reg & BIT(PULL_UP_SEL_OFF))
#define OUTPUT_ENABLE_OFF 23
#define SW_CNTRL_IN_OFF 24
#define SW_CNTRL_EN_OFF 25
+#define WAKECNTRL_Z_OFF 27
#define INTERRUPT_STS_OFF 28
#define WAKE_STS_OFF 29